From e5a9d5baa4debc5d01f049c9f31886b2f6dab78a Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 8 Aug 2013 12:08:53 +0200 Subject: OSELAS.BSP-EnergyMicro-Gecko: migrate to PTXdist 2013.07.1 --- platformconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/platformconfig b/platformconfig index f8c6ca4..448dc83 100644 --- a/platformconfig +++ b/platformconfig @@ -1,8 +1,8 @@ # # Automatically generated file; DO NOT EDIT. -# PTXdist 2013.01.0 +# PTXdist 2013.07.1 # -PTXCONF_PLATFORMCONFIG_VERSION="2013.01.0" +PTXCONF_PLATFORMCONFIG_VERSION="2013.07.1" PTXCONF_RUNTIME=y PTXCONF_BUILDTIME=y PTXCONF__platformconfig_MAGIC__=y @@ -185,6 +185,7 @@ PTXCONF_IMAGE_ROMFS_EXTRA_ARGS="" # PTXCONF_IMAGE_UBI is not set # PTXCONF_IMAGE_UBIFS is not set # PTXCONF_IMAGE_UIMAGE is not set +# PTXCONF_HOST_BZIP2 is not set # PTXCONF_HOST_CDRKIT is not set # PTXCONF_HOST_CMAKE is not set # PTXCONF_HOST_CRAMFS is not set @@ -193,12 +194,11 @@ PTXCONF_IMAGE_ROMFS_EXTRA_ARGS="" # PTXCONF_HOST_GENEXT2FS is not set # PTXCONF_HOST_GENIMAGE is not set # PTXCONF_HOST_GENPART is not set -# PTXCONF_HOST_LIBICONV is not set # PTXCONF_HOST_GETTEXT is not set # PTXCONF_HOST_LIBBLKID is not set -# PTXCONF_HOST_LIBBZ2 is not set # PTXCONF_HOST_LIBCAP is not set # PTXCONF_HOST_LIBCONFUSE is not set +# PTXCONF_HOST_LIBICONV is not set # PTXCONF_HOST_LIBLZO is not set # PTXCONF_HOST_LIBUUID is not set # PTXCONF_HOST_LZOP is not set -- cgit v1.2.3 From 78203a14c82bfbf14b2aca3444bb5199e3a96dd4 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 18 Nov 2013 20:20:06 +0100 Subject: platform-energymicro-efm32gg-dk3750: update Linux patch stack to v3.12-rc4 This adds framebuffer and i2c support --- kernelconfig-3.11-rc1 | 1281 ---------------- kernelconfig-3.12-rc4 | 1542 ++++++++++++++++++++ ...ARMv7-M-Fix-name-of-NVIC-handler-function.patch | 29 - .../0002-hwmon-efm32-adc-new-driver.patch | 357 ----- ...-spi-new-controller-driver-for-efm32-SoCs.patch | 533 ------- ...tform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch | 843 ----------- .../0005-ARM-efm32-some-more-stuff.patch | 297 ---- ...-driver-for-Energy-Micro-s-GPIO-component.patch | 424 ------ .../0007-efm-board-controller-driver.patch | 234 --- .../0008-ARM-v7m-add-trivial-suspend-support.patch | 71 - ...009-ARM-efm32-add-trivial-suspend-support.patch | 78 - ...low-a-bootloader-to-be-embedded-and-do-it.patch | 306 ---- ...reserve-memory-for-device-tree-if-it-s-be.patch | 31 - ...tack-dumps-provoked-by-BUG-a-bit-more-hel.patch | 34 - .../0013-HACK-ARM-increase-TASK_SIZE-for-MMU.patch | 34 - .../0014-HACK-work-around-for-big-images.patch | 20 - ...rinthex-and-printch-work-on-efm32-with-XI.patch | 30 - patches/linux-3.11-rc1/0016-wip.patch | 21 - patches/linux-3.11-rc1/series | 19 - ...01-ARM-v7-M-drop-using-mach-entry-macro.S.patch | 29 + ...ecate-mach-timex.h-for-ARCH_MULTIPLATFORM.patch | 869 +++++++++++ ...ch-xyz-Makefile.boot-optional-for-ARCH_MU.patch | 63 + ...tform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch | 209 +++ ...f_clk_init-from-default-time_init-handler.patch | 75 + .../0006-ARM-DEBUG_LL-on-efm32-SoCs.patch | 116 ++ ...m32-drop-unused-struct-and-fix-size-check.patch | 40 + ...CH_MULTIPLATFORM-dependency-of-XIP_KERNEL.patch | 39 + ...RM-allow-MULTIPLATFORM-on-no-MMU-machines.patch | 30 + ...ARM-prepare-ARMv7-M-for-MULTIPLATFORM-use.patch | 70 + ...source-Provide-timekeeping-for-efm32-SoCs.patch | 362 +++++ .../0012-clk-new-driver-for-efm32-SoC.patch | 186 +++ ...trees-for-Energy-Micro-s-EFM32-Cortex-M3-.patch | 324 ++++ .../0014-ARM-efm32-some-more-stuff.patch | 298 ++++ ...-driver-for-Energy-Micro-s-GPIO-component.patch | 410 ++++++ .../0016-efm-board-controller-driver.patch | 239 +++ .../0017-hwmon-efm32-adc-new-driver.patch | 375 +++++ .../0018-ARM-v7m-add-trivial-suspend-support.patch | 25 + ...019-ARM-efm32-add-trivial-suspend-support.patch | 101 ++ ...ARM-efm32gg-dk3750-add-simple-framebuffer.patch | 48 + ...low-a-bootloader-to-be-embedded-and-do-it.patch | 306 ++++ ...reserve-memory-for-device-tree-if-it-s-be.patch | 31 + ...tack-dumps-provoked-by-BUG-a-bit-more-hel.patch | 37 + .../0024-HACK-ARM-increase-TASK_SIZE-for-MMU.patch | 34 + .../0025-HACK-work-around-for-big-images.patch | 20 + ...rinthex-and-printch-work-on-efm32-with-XI.patch | 30 + patches/linux-3.12-rc4/0027-wip-i2c.patch | 588 ++++++++ ...ffer-provide-generic-get_fb_unmapped_area.patch | 62 + patches/linux-3.12-rc4/series | 31 + platformconfig | 4 +- 49 files changed, 6591 insertions(+), 4644 deletions(-) delete mode 100644 kernelconfig-3.11-rc1 create mode 100644 kernelconfig-3.12-rc4 delete mode 100644 patches/linux-3.11-rc1/0001-ARM-ARMv7-M-Fix-name-of-NVIC-handler-function.patch delete mode 100644 patches/linux-3.11-rc1/0002-hwmon-efm32-adc-new-driver.patch delete mode 100644 patches/linux-3.11-rc1/0003-spi-new-controller-driver-for-efm32-SoCs.patch delete mode 100644 patches/linux-3.11-rc1/0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch delete mode 100644 patches/linux-3.11-rc1/0005-ARM-efm32-some-more-stuff.patch delete mode 100644 patches/linux-3.11-rc1/0006-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch delete mode 100644 patches/linux-3.11-rc1/0007-efm-board-controller-driver.patch delete mode 100644 patches/linux-3.11-rc1/0008-ARM-v7m-add-trivial-suspend-support.patch delete mode 100644 patches/linux-3.11-rc1/0009-ARM-efm32-add-trivial-suspend-support.patch delete mode 100644 patches/linux-3.11-rc1/0010-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch delete mode 100644 patches/linux-3.11-rc1/0011-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch delete mode 100644 patches/linux-3.11-rc1/0012-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch delete mode 100644 patches/linux-3.11-rc1/0013-HACK-ARM-increase-TASK_SIZE-for-MMU.patch delete mode 100644 patches/linux-3.11-rc1/0014-HACK-work-around-for-big-images.patch delete mode 100644 patches/linux-3.11-rc1/0015-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch delete mode 100644 patches/linux-3.11-rc1/0016-wip.patch delete mode 100644 patches/linux-3.11-rc1/series create mode 100644 patches/linux-3.12-rc4/0001-ARM-v7-M-drop-using-mach-entry-macro.S.patch create mode 100644 patches/linux-3.12-rc4/0002-ARM-deprecate-mach-timex.h-for-ARCH_MULTIPLATFORM.patch create mode 100644 patches/linux-3.12-rc4/0003-ARM-make-mach-xyz-Makefile.boot-optional-for-ARCH_MU.patch create mode 100644 patches/linux-3.12-rc4/0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch create mode 100644 patches/linux-3.12-rc4/0005-ARM-call-of_clk_init-from-default-time_init-handler.patch create mode 100644 patches/linux-3.12-rc4/0006-ARM-DEBUG_LL-on-efm32-SoCs.patch create mode 100644 patches/linux-3.12-rc4/0007-spi-efm32-drop-unused-struct-and-fix-size-check.patch create mode 100644 patches/linux-3.12-rc4/0008-ARM-drop-ARCH_MULTIPLATFORM-dependency-of-XIP_KERNEL.patch create mode 100644 patches/linux-3.12-rc4/0009-ARM-allow-MULTIPLATFORM-on-no-MMU-machines.patch create mode 100644 patches/linux-3.12-rc4/0010-RFC-ARM-prepare-ARMv7-M-for-MULTIPLATFORM-use.patch create mode 100644 patches/linux-3.12-rc4/0011-clocksource-Provide-timekeeping-for-efm32-SoCs.patch create mode 100644 patches/linux-3.12-rc4/0012-clk-new-driver-for-efm32-SoC.patch create mode 100644 patches/linux-3.12-rc4/0013-ARM-device-trees-for-Energy-Micro-s-EFM32-Cortex-M3-.patch create mode 100644 patches/linux-3.12-rc4/0014-ARM-efm32-some-more-stuff.patch create mode 100644 patches/linux-3.12-rc4/0015-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch create mode 100644 patches/linux-3.12-rc4/0016-efm-board-controller-driver.patch create mode 100644 patches/linux-3.12-rc4/0017-hwmon-efm32-adc-new-driver.patch create mode 100644 patches/linux-3.12-rc4/0018-ARM-v7m-add-trivial-suspend-support.patch create mode 100644 patches/linux-3.12-rc4/0019-ARM-efm32-add-trivial-suspend-support.patch create mode 100644 patches/linux-3.12-rc4/0020-ARM-efm32gg-dk3750-add-simple-framebuffer.patch create mode 100644 patches/linux-3.12-rc4/0021-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch create mode 100644 patches/linux-3.12-rc4/0022-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch create mode 100644 patches/linux-3.12-rc4/0023-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch create mode 100644 patches/linux-3.12-rc4/0024-HACK-ARM-increase-TASK_SIZE-for-MMU.patch create mode 100644 patches/linux-3.12-rc4/0025-HACK-work-around-for-big-images.patch create mode 100644 patches/linux-3.12-rc4/0026-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch create mode 100644 patches/linux-3.12-rc4/0027-wip-i2c.patch create mode 100644 patches/linux-3.12-rc4/0028-RFC-framebuffer-provide-generic-get_fb_unmapped_area.patch create mode 100644 patches/linux-3.12-rc4/series diff --git a/kernelconfig-3.11-rc1 b/kernelconfig-3.11-rc1 deleted file mode 100644 index 94e2d01..0000000 --- a/kernelconfig-3.11-rc1 +++ /dev/null @@ -1,1281 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/arm 3.11.0-rc1 Kernel Configuration -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_NO_IOPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_VECTORS_BASE=0x00000000 -CONFIG_PHYS_OFFSET=0x88000000 -CONFIG_GENERIC_BUG=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_IRQ_WORK=y - -# -# General setup -# -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_CROSS_COMPILE="" -# CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_XZ=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_HAVE_KERNEL_LZ4=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KERNEL_XZ is not set -# CONFIG_KERNEL_LZO is not set -# CONFIG_KERNEL_LZ4 is not set -CONFIG_DEFAULT_HOSTNAME="(none)" -# CONFIG_SYSVIPC is not set -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_FHANDLE is not set -# CONFIG_AUDIT is not set -CONFIG_HAVE_GENERIC_HARDIRQS=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_KTIME_SCALAR=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y - -# -# Timers subsystem -# -CONFIG_TICK_ONESHOT=y -CONFIG_HZ_PERIODIC=y -# CONFIG_NO_HZ_IDLE is not set -# CONFIG_NO_HZ is not set -CONFIG_HIGH_RES_TIMERS=y - -# -# CPU/Task time and stats accounting -# -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_IRQ_TIME_ACCOUNTING is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set - -# -# RCU Subsystem -# -CONFIG_TREE_PREEMPT_RCU=y -CONFIG_PREEMPT_RCU=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RCU_FANOUT=32 -CONFIG_RCU_FANOUT_LEAF=16 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_RCU_NOCB_CPU is not set -# CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=12 -CONFIG_GENERIC_SCHED_CLOCK=y -# CONFIG_CHECKPOINT_RESTORE is not set -# CONFIG_NAMESPACES is not set -CONFIG_UIDGID_CONVERTED=y -# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set -# CONFIG_SCHED_AUTOGROUP is not set -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_HAVE_UID16=y -CONFIG_EXPERT=y -# CONFIG_UID16 is not set -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -CONFIG_PRINTK=y -CONFIG_BUG=y -# CONFIG_BASE_FULL is not set -# CONFIG_FUTEX is not set -# CONFIG_EPOLL is not set -# CONFIG_SIGNALFD is not set -CONFIG_TIMERFD=y -# CONFIG_EVENTFD is not set -# CONFIG_AIO is not set -CONFIG_EMBEDDED=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y - -# -# Kernel Performance Events And Counters -# -# CONFIG_PERF_EVENTS is not set -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_SLUB_DEBUG is not set -CONFIG_COMPAT_BRK=y -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_SLUB_CPU_PARTIAL is not set -# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OLD_SIGACTION=y - -# -# GCOV-based kernel profiling -# -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_BASE_SMALL=1 -# CONFIG_MODULES is not set -CONFIG_BLOCK=y -# CONFIG_LBDAF is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_BSGLIB is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -CONFIG_EFI_PARTITION=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_FREEZER=y - -# -# System Type -# -# CONFIG_MMU is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -CONFIG_ARCH_EFM32=y -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_LPC32XX is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_SHMOBILE is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C24XX is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5P64X0 is not set -# CONFIG_ARCH_S5PC100 is not set -# CONFIG_ARCH_S5PV210 is not set -# CONFIG_ARCH_EXYNOS is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_PLAT_SPEAR is not set - -# -# ST-Ericsson AB U300/U335 Platform -# - -# -# ST-Ericsson Mobile Platform Products -# - -# -# ST-Ericsson U300/U335 Feature Selections -# - -# -# Processor Type -# -# CONFIG_CPU_ARM7TDMI is not set -# CONFIG_CPU_ARM9TDMI is not set -CONFIG_CPU_V7M=y -CONFIG_CPU_THUMBONLY=y -CONFIG_CPU_32v7M=y -CONFIG_CPU_ABRT_NOMMU=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_CACHE_NOP=y - -# -# Processor Features -# -# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set -CONFIG_ARM_THUMB=y -# CONFIG_CACHE_L2X0 is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_ARM_NR_BANKS=8 -CONFIG_SET_MEM_PARAM=y -CONFIG_DRAM_BASE=0x88000000 -CONFIG_DRAM_SIZE=0x00400000 -CONFIG_FLASH_MEM_BASE=0x8c000000 -CONFIG_FLASH_SIZE=0x01000000 - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_ARCH_NR_GPIO=0 -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set -CONFIG_PREEMPT=y -CONFIG_PREEMPT_COUNT=y -CONFIG_HZ=100 -CONFIG_SCHED_HRTICK=y -CONFIG_THUMB2_KERNEL=y -CONFIG_ARM_ASM_UNIFIED=y -CONFIG_AEABI=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_HAVE_MEMBLOCK=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 -CONFIG_NEED_PER_CPU_KM=y -# CONFIG_CLEANCACHE is not set -# CONFIG_ZBUD is not set -CONFIG_FORCE_MAX_ZONEORDER=9 -# CONFIG_SECCOMP is not set -# CONFIG_CC_STACKPROTECTOR is not set - -# -# Boot options -# -CONFIG_USE_OF=y -CONFIG_ATAGS=y -# CONFIG_DEPRECATED_PARAM_STRUCT is not set -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -# CONFIG_ARM_APPENDED_DTB is not set -CONFIG_CMDLINE="" -CONFIG_XIP_KERNEL=y -CONFIG_XIP_PHYS_ADDR=0x8c000000 -# CONFIG_KEXEC is not set -# CONFIG_CRASH_DUMP is not set -# CONFIG_AUTO_ZRELADDR is not set - -# -# CPU Power Management -# -# CONFIG_CPU_IDLE is not set -# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# - -# -# Userspace binary formats -# -CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y -CONFIG_BINFMT_SCRIPT=y -CONFIG_BINFMT_FLAT=y -# CONFIG_BINFMT_ZFLAT is not set -CONFIG_BINFMT_SHARED_FLAT=y -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set -# CONFIG_COREDUMP is not set - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_PM_SLEEP=y -# CONFIG_PM_AUTOSLEEP is not set -# CONFIG_PM_WAKELOCKS is not set -# CONFIG_PM_RUNTIME is not set -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -# CONFIG_APM_EMULATION is not set -CONFIG_PM_CLK=y -# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set -CONFIG_CPU_PM=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set -CONFIG_UNIX=y -# CONFIG_UNIX_DIAG is not set -# CONFIG_XFRM_USER is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE_DEMUX is not set -# CONFIG_NET_IP_TUNNEL is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_L2TP is not set -# CONFIG_BRIDGE is not set -CONFIG_HAVE_NET_DSA=y -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set -# CONFIG_BATMAN_ADV is not set -# CONFIG_OPENVSWITCH is not set -# CONFIG_VSOCKETS is not set -# CONFIG_NETLINK_MMAP is not set -# CONFIG_NETLINK_DIAG is not set -# CONFIG_NET_MPLS_GSO is not set -CONFIG_NET_LL_RX_POLL=y -CONFIG_BQL=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -# CONFIG_WIRELESS is not set -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set -# CONFIG_CAIF is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_NFC is not set -CONFIG_HAVE_BPF_JIT=y - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="" -# CONFIG_DEVTMPFS is not set -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_GENERIC_CPU_DEVICES is not set -# CONFIG_DMA_SHARED_BUFFER is not set - -# -# Bus devices -# -# CONFIG_ARM_CCI is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -CONFIG_MTD_OF_PARTS=y -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_BLKDEVS=y -# CONFIG_MTD_BLOCK is not set -CONFIG_MTD_BLOCK_RO=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_SM_FTL is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -CONFIG_MTD_ROM=y -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_PHYSMAP_OF is not set -CONFIG_MTD_UCLINUX=y -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SST25L is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOCG3 is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set -# CONFIG_MTD_UBI is not set -CONFIG_DTC=y -CONFIG_OF=y - -# -# Device Tree and Open Firmware support -# -# CONFIG_PROC_DEVICETREE is not set -# CONFIG_OF_SELFTEST is not set -CONFIG_OF_FLATTREE=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_IRQ=y -CONFIG_OF_NET=y -CONFIG_OF_MTD=y -# CONFIG_PARPORT is not set -# CONFIG_BLK_DEV is not set - -# -# Misc devices -# -# CONFIG_AD525X_DPOT is not set -# CONFIG_ATMEL_PWM is not set -# CONFIG_DUMMY_IRQ is not set -# CONFIG_ATMEL_SSC is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_TI_DAC7512 is not set -# CONFIG_BMP085_SPI is not set -# CONFIG_LATTICE_ECP3_CONFIG is not set -# CONFIG_SRAM is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT25 is not set -CONFIG_EEPROM_93CX6=y -# CONFIG_EEPROM_93XX46 is not set - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set - -# -# Altera FPGA firmware download module -# - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_DMA is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -CONFIG_MII=y -CONFIG_NET_CORE=y -# CONFIG_BONDING is not set -# CONFIG_DUMMY is not set -# CONFIG_EQUALIZER is not set -# CONFIG_NET_TEAM is not set -# CONFIG_MACVLAN is not set -# CONFIG_VXLAN is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -# CONFIG_NLMON is not set - -# -# CAIF transport drivers -# - -# -# Distributed Switch Architecture drivers -# -# CONFIG_NET_DSA_MV88E6XXX is not set -# CONFIG_NET_DSA_MV88E6060 is not set -# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set -# CONFIG_NET_DSA_MV88E6131 is not set -# CONFIG_NET_DSA_MV88E6123_61_65 is not set -CONFIG_ETHERNET=y -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_CADENCE is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_CALXEDA_XGMAC is not set -# CONFIG_NET_VENDOR_CIRRUS is not set -# CONFIG_DM9000 is not set -# CONFIG_DNET is not set -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -CONFIG_NET_VENDOR_MICREL=y -CONFIG_KS8851=y -# CONFIG_KS8851_MLL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_ETHOC is not set -# CONFIG_SH_ETH is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_PHYLIB is not set -# CONFIG_MICREL_KS8995MA is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_WLAN is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# -# CONFIG_WAN is not set -# CONFIG_ISDN is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_TTY=y -# CONFIG_VT is not set -# CONFIG_UNIX98_PTYS is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_NONSTANDARD=y -# CONFIG_N_HDLC is not set -# CONFIG_N_GSM is not set -# CONFIG_TRACE_SINK is not set -# CONFIG_DEVKMEM is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX310X is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_IFX6X60 is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set -CONFIG_SERIAL_EFM32_UART=y -CONFIG_SERIAL_EFM32_UART_CONSOLE=y -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_TTY_PRINTK is not set -# CONFIG_HVC_DCC is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -# CONFIG_I2C is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -CONFIG_SPI_BITBANG=y -CONFIG_SPI_EFM32=y -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_FSL_SPI is not set -# CONFIG_SPI_OC_TINY is not set -# CONFIG_SPI_PXA2XX_PCI is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_DESIGNWARE is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set -# CONFIG_HSI is not set - -# -# PPS support -# -# CONFIG_PPS is not set - -# -# PPS generators support -# - -# -# PTP clock support -# -# CONFIG_PTP_1588_CLOCK is not set - -# -# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -# -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIO_DEVRES=y -CONFIG_GPIOLIB=y -CONFIG_OF_GPIO=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO drivers: -# -# CONFIG_GPIO_GENERIC_PLATFORM is not set -CONFIG_GPIO_EFM32=y -# CONFIG_GPIO_EM is not set -# CONFIG_GPIO_RCAR is not set -# CONFIG_GPIO_TS5500 is not set -# CONFIG_GPIO_GRGPIO is not set - -# -# I2C GPIO expanders: -# - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_GPIO_MC33880 is not set -# CONFIG_GPIO_74X164 is not set - -# -# AC97 GPIO expanders: -# - -# -# MODULbus GPIO expanders: -# - -# -# USB GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_POWER_AVS is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7314 is not set -# CONFIG_SENSORS_ADCXX is not set -# CONFIG_SENSORS_ADT7310 is not set -CONFIG_SENSORS_EFM32_ADC=y -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_GPIO_FAN is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM70 is not set -# CONFIG_SENSORS_MAX1111 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH56XX_COMMON is not set -# CONFIG_SENSORS_ADS7871 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_THERMAL is not set -# CONFIG_WATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set -CONFIG_BCMA_POSSIBLE=y - -# -# Broadcom specific AMBA -# -# CONFIG_BCMA is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_CROS_EC is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_MFD_DA9052_SPI is not set -# CONFIG_MFD_MC13XXX_SPI is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_EZX_PCAP is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_SYSCON is not set -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_TPS65912 is not set -# CONFIG_MFD_TPS65912_SPI is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_MFD_ARIZONA_SPI is not set -# CONFIG_MFD_WM831X_SPI is not set -CONFIG_MFD_EFM32BOARD=y -# CONFIG_VEXPRESS_CONFIG is not set -# CONFIG_REGULATOR is not set -# CONFIG_MEDIA_SUPPORT is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -# CONFIG_FB is not set -# CONFIG_EXYNOS_VIDEO is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -# CONFIG_SOUND is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_MMC is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_EDAC is not set -CONFIG_RTC_LIB=y -# CONFIG_RTC_CLASS is not set -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set -# CONFIG_VIRT_DRIVERS is not set - -# -# Virtio drivers -# -# CONFIG_VIRTIO_MMIO is not set - -# -# Microsoft Hyper-V guest support -# -# CONFIG_STAGING is not set -CONFIG_CLKDEV_LOOKUP=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# -# CONFIG_COMMON_CLK_DEBUG is not set - -# -# Hardware Spinlock drivers -# -CONFIG_CLKSRC_MMIO=y -# CONFIG_MAILBOX is not set -# CONFIG_IOMMU_SUPPORT is not set - -# -# Remoteproc drivers -# -# CONFIG_STE_MODEM_RPROC is not set - -# -# Rpmsg drivers -# -# CONFIG_PM_DEVFREQ is not set -# CONFIG_EXTCON is not set -# CONFIG_MEMORY is not set -# CONFIG_IIO is not set -# CONFIG_PWM is not set -CONFIG_IRQCHIP=y -CONFIG_ARM_NVIC=y -# CONFIG_IPACK_BUS is not set -# CONFIG_RESET_CONTROLLER is not set -# CONFIG_FMC is not set - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_BTRFS_FS is not set -# CONFIG_NILFS2_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_FILE_LOCKING is not set -# CONFIG_FSNOTIFY is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -# CONFIG_FANOTIFY is not set -# CONFIG_QUOTA is not set -# CONFIG_QUOTACTL is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_LOGFS is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -CONFIG_ROMFS_FS=y -# CONFIG_ROMFS_BACKED_BY_BLOCK is not set -CONFIG_ROMFS_BACKED_BY_MTD=y -# CONFIG_ROMFS_BACKED_BY_BOTH is not set -CONFIG_ROMFS_ON_MTD=y -# CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_F2FS_FS is not set -# CONFIG_NETWORK_FILESYSTEMS is not set -# CONFIG_NLS is not set - -# -# Kernel hacking -# - -# -# printk and dmesg options -# -CONFIG_PRINTK_TIME=y -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 -# CONFIG_BOOT_PRINTK_DELAY is not set - -# -# Compile-time checks and compiler options -# -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_INFO_REDUCED is not set -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_READABLE_ASM is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y - -# -# Memory Debugging -# -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_STATS is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_NOMMU_REGIONS is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_SHIRQ is not set - -# -# Debug Lockups and Hangs -# -# CONFIG_LOCKUP_DETECTOR is not set -# CONFIG_DETECT_HUNG_TASK is not set -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -# CONFIG_SCHED_DEBUG is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -CONFIG_DEBUG_PREEMPT=y - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_ATOMIC_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set - -# -# RCU Debugging -# -# CONFIG_PROVE_RCU_DELAY is not set -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_RCU_TORTURE_TEST is not set -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -CONFIG_RCU_CPU_STALL_VERBOSE=y -# CONFIG_RCU_CPU_STALL_INFO is not set -# CONFIG_RCU_TRACE is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_NOTIFIER_ERROR_INJECTION is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACING_SUPPORT=y -# CONFIG_FTRACE is not set - -# -# Runtime Testing -# -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y -# CONFIG_DEBUG_USER is not set -CONFIG_DEBUG_LL=y -# CONFIG_DEBUG_EFM32_USART1 is not set -CONFIG_DEBUG_EFM32_UART1=y -# CONFIG_DEBUG_LL_UART_NONE is not set -# CONFIG_DEBUG_ICEDCC is not set -# CONFIG_DEBUG_SEMIHOSTING is not set -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h" -# CONFIG_EARLY_PRINTK is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -CONFIG_DEFAULT_SECURITY_DAC=y -CONFIG_DEFAULT_SECURITY="" -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_FIPS is not set -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set -# CONFIG_CRYPTO_USER is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_CMAC is not set -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_CRC32 is not set -# CONFIG_CRYPTO_CRCT10DIF is not set -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA1_ARM is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_ARM is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=y -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -CONFIG_CRYPTO_HW=y -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_NET_UTILS=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_IO=y -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -# CONFIG_CRC8 is not set -# CONFIG_XZ_DEC is not set -# CONFIG_XZ_DEC_BCJ is not set -CONFIG_HAS_IOMEM=y -CONFIG_HAS_DMA=y -CONFIG_DQL=y -CONFIG_NLATTR=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y -# CONFIG_AVERAGE is not set -# CONFIG_CORDIC is not set -# CONFIG_DDR is not set -# CONFIG_VIRTUALIZATION is not set diff --git a/kernelconfig-3.12-rc4 b/kernelconfig-3.12-rc4 new file mode 100644 index 0000000..1bd5889 --- /dev/null +++ b/kernelconfig-3.12-rc4 @@ -0,0 +1,1542 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/arm 3.12.0-rc4 Kernel Configuration +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_NO_IOPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_VECTORS_BASE=0x00000000 +CONFIG_PHYS_OFFSET=0x88000000 +CONFIG_GENERIC_BUG=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_IRQ_WORK=y + +# +# General setup +# +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_CROSS_COMPILE="" +# CONFIG_COMPILE_TEST is not set +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_HAVE_KERNEL_GZIP=y +CONFIG_HAVE_KERNEL_LZMA=y +CONFIG_HAVE_KERNEL_XZ=y +CONFIG_HAVE_KERNEL_LZO=y +CONFIG_HAVE_KERNEL_LZ4=y +CONFIG_KERNEL_GZIP=y +# CONFIG_KERNEL_LZMA is not set +# CONFIG_KERNEL_XZ is not set +# CONFIG_KERNEL_LZO is not set +# CONFIG_KERNEL_LZ4 is not set +CONFIG_DEFAULT_HOSTNAME="(none)" +# CONFIG_SYSVIPC is not set +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_FHANDLE is not set +# CONFIG_AUDIT is not set + +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y +# CONFIG_IRQ_DOMAIN_DEBUG is not set +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_SPARSE_IRQ=y +CONFIG_KTIME_SCALAR=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y + +# +# Timers subsystem +# +CONFIG_HZ_PERIODIC=y +# CONFIG_NO_HZ_IDLE is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set + +# +# CPU/Task time and stats accounting +# +CONFIG_TICK_CPU_ACCOUNTING=y +# CONFIG_IRQ_TIME_ACCOUNTING is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set + +# +# RCU Subsystem +# +CONFIG_TREE_PREEMPT_RCU=y +CONFIG_PREEMPT_RCU=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RCU_FANOUT=32 +CONFIG_RCU_FANOUT_LEAF=16 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_RCU_BOOST is not set +# CONFIG_RCU_NOCB_CPU is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=12 +CONFIG_GENERIC_SCHED_CLOCK=y +# CONFIG_CHECKPOINT_RESTORE is not set +# CONFIG_NAMESPACES is not set +# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set +# CONFIG_SCHED_AUTOGROUP is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_HAVE_UID16=y +CONFIG_EXPERT=y +# CONFIG_UID16 is not set +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +# CONFIG_BASE_FULL is not set +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +# CONFIG_SIGNALFD is not set +CONFIG_TIMERFD=y +# CONFIG_EVENTFD is not set +# CONFIG_AIO is not set +CONFIG_EMBEDDED=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y + +# +# Kernel Performance Events And Counters +# +# CONFIG_PERF_EVENTS is not set +# CONFIG_VM_EVENT_COUNTERS is not set +# CONFIG_SLUB_DEBUG is not set +CONFIG_COMPAT_BRK=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_MMAP_ALLOW_UNINITIALIZED is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OLD_SIGACTION=y + +# +# GCOV-based kernel profiling +# +# CONFIG_GCOV_KERNEL is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=1 +# CONFIG_MODULES is not set +CONFIG_BLOCK=y +# CONFIG_LBDAF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_BSGLIB is not set +# CONFIG_BLK_DEV_INTEGRITY is not set +# CONFIG_BLK_CMDLINE_PARSER is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_EFI_PARTITION=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_FREEZER=y + +# +# System Type +# +# CONFIG_MMU is not set +# CONFIG_ARCH_MULTIPLATFORM is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +CONFIG_ARCH_EFM32=y +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_DOVE is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_LPC32XX is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_SHMOBILE is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C24XX is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5P64X0 is not set +# CONFIG_ARCH_S5PC100 is not set +# CONFIG_ARCH_S5PV210 is not set +# CONFIG_ARCH_EXYNOS is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_PLAT_SPEAR is not set + +# +# Processor Type +# +# CONFIG_CPU_ARM7TDMI is not set +# CONFIG_CPU_ARM9TDMI is not set +CONFIG_CPU_V7M=y +CONFIG_CPU_THUMBONLY=y +CONFIG_CPU_32v7M=y +CONFIG_CPU_ABRT_NOMMU=y +CONFIG_CPU_PABRT_LEGACY=y +CONFIG_CPU_CACHE_NOP=y + +# +# Processor Features +# +# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set +CONFIG_ARM_THUMB=y +# CONFIG_KUSER_HELPERS is not set +# CONFIG_CACHE_L2X0 is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_ARM_NR_BANKS=8 +CONFIG_SET_MEM_PARAM=y +CONFIG_DRAM_BASE=0x88000000 +CONFIG_DRAM_SIZE=0x00400000 +CONFIG_FLASH_MEM_BASE=0x8c000000 +CONFIG_FLASH_SIZE=0x01000000 + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_ARCH_NR_GPIO=0 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +CONFIG_HZ_FIXED=0 +CONFIG_HZ_100=y +# CONFIG_HZ_200 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_500 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +# CONFIG_SCHED_HRTICK is not set +CONFIG_THUMB2_KERNEL=y +CONFIG_ARM_ASM_UNIFIED=y +CONFIG_AEABI=y +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_HAVE_MEMBLOCK=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 +CONFIG_NEED_PER_CPU_KM=y +# CONFIG_CLEANCACHE is not set +# CONFIG_ZBUD is not set +CONFIG_FORCE_MAX_ZONEORDER=9 +# CONFIG_SECCOMP is not set +# CONFIG_CC_STACKPROTECTOR is not set + +# +# Boot options +# +CONFIG_USE_OF=y +CONFIG_ATAGS=y +# CONFIG_DEPRECATED_PARAM_STRUCT is not set +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +# CONFIG_ARM_APPENDED_DTB is not set +CONFIG_CMDLINE="" +CONFIG_XIP_KERNEL=y +CONFIG_XIP_PHYS_ADDR=0x8c000000 +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +CONFIG_AUTO_ZRELADDR=y + +# +# CPU Power Management +# + +# +# CPU Idle +# +# CONFIG_CPU_IDLE is not set +# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# + +# +# Userspace binary formats +# +CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y +CONFIG_BINFMT_SCRIPT=y +CONFIG_BINFMT_FLAT=y +# CONFIG_BINFMT_ZFLAT is not set +CONFIG_BINFMT_SHARED_FLAT=y +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_COREDUMP is not set + +# +# Power management options +# +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_PM_SLEEP=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set +# CONFIG_PM_RUNTIME is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +# CONFIG_APM_EMULATION is not set +CONFIG_PM_CLK=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_CPU_PM=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_DIAG is not set +CONFIG_UNIX=y +# CONFIG_UNIX_DIAG is not set +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE_DEMUX is not set +# CONFIG_NET_IP_TUNNEL is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETWORK_PHY_TIMESTAMPING is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_L2TP is not set +# CONFIG_BRIDGE is not set +CONFIG_HAVE_NET_DSA=y +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set +# CONFIG_BATMAN_ADV is not set +# CONFIG_OPENVSWITCH is not set +# CONFIG_VSOCKETS is not set +# CONFIG_NETLINK_MMAP is not set +# CONFIG_NETLINK_DIAG is not set +# CONFIG_NET_MPLS_GSO is not set +CONFIG_NET_RX_BUSY_POLL=y +CONFIG_BQL=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_WIRELESS is not set +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set +# CONFIG_CAIF is not set +# CONFIG_CEPH_LIB is not set +# CONFIG_NFC is not set +CONFIG_HAVE_BPF_JIT=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_GENERIC_CPU_DEVICES is not set +# CONFIG_DMA_SHARED_BUFFER is not set + +# +# Bus devices +# +# CONFIG_ARM_CCI is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_BLKDEVS=y +# CONFIG_MTD_BLOCK is not set +CONFIG_MTD_BLOCK_RO=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_SM_FTL is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +CONFIG_MTD_ROM=y +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_MTD_UCLINUX=y +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOCG3 is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set +# CONFIG_MTD_UBI is not set +CONFIG_DTC=y +CONFIG_OF=y + +# +# Device Tree and Open Firmware support +# +CONFIG_PROC_DEVICETREE=y +# CONFIG_OF_SELFTEST is not set +CONFIG_OF_FLATTREE=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_IRQ=y +CONFIG_OF_NET=y +CONFIG_OF_MTD=y +CONFIG_OF_RESERVED_MEM=y +# CONFIG_PARPORT is not set +# CONFIG_BLK_DEV is not set + +# +# Misc devices +# +# CONFIG_AD525X_DPOT is not set +# CONFIG_ATMEL_PWM is not set +# CONFIG_DUMMY_IRQ is not set +# CONFIG_ICS932S401 is not set +# CONFIG_ATMEL_SSC is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_APDS9802ALS is not set +# CONFIG_ISL29003 is not set +# CONFIG_ISL29020 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_BH1780 is not set +# CONFIG_SENSORS_BH1770 is not set +# CONFIG_SENSORS_APDS990X is not set +# CONFIG_HMC6352 is not set +# CONFIG_DS1682 is not set +# CONFIG_TI_DAC7512 is not set +# CONFIG_BMP085_I2C is not set +# CONFIG_BMP085_SPI is not set +# CONFIG_USB_SWITCH_FSA9480 is not set +# CONFIG_LATTICE_ECP3_CONFIG is not set +# CONFIG_SRAM is not set +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +CONFIG_EEPROM_AT24=y +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +CONFIG_EEPROM_93CX6=y +# CONFIG_EEPROM_93XX46 is not set + +# +# Texas Instruments shared transport line discipline +# +# CONFIG_TI_ST is not set + +# +# Altera FPGA firmware download module +# +# CONFIG_ALTERA_STAPL is not set + +# +# SCSI device support +# +CONFIG_SCSI_MOD=y +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +CONFIG_MII=y +CONFIG_NET_CORE=y +# CONFIG_BONDING is not set +# CONFIG_DUMMY is not set +# CONFIG_EQUALIZER is not set +# CONFIG_NET_TEAM is not set +# CONFIG_MACVLAN is not set +# CONFIG_VXLAN is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_NLMON is not set + +# +# CAIF transport drivers +# + +# +# Distributed Switch Architecture drivers +# +# CONFIG_NET_DSA_MV88E6XXX is not set +# CONFIG_NET_DSA_MV88E6060 is not set +# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set +# CONFIG_NET_DSA_MV88E6131 is not set +# CONFIG_NET_DSA_MV88E6123_61_65 is not set +CONFIG_ETHERNET=y +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_CALXEDA_XGMAC is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_DM9000 is not set +# CONFIG_DNET is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +CONFIG_NET_VENDOR_MICREL=y +CONFIG_KS8851=y +# CONFIG_KS8851_MLL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_ETHOC is not set +# CONFIG_SH_ETH is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_PHYLIB is not set +# CONFIG_MICREL_KS8995MA is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_WLAN is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_TTY=y +# CONFIG_VT is not set +# CONFIG_UNIX98_PTYS is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_N_HDLC is not set +# CONFIG_N_GSM is not set +# CONFIG_TRACE_SINK is not set +# CONFIG_DEVKMEM is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +# CONFIG_SERIAL_MAX310X is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_SCCNXP is not set +# CONFIG_SERIAL_TIMBERDALE is not set +# CONFIG_SERIAL_ALTERA_JTAGUART is not set +# CONFIG_SERIAL_ALTERA_UART is not set +# CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_XILINX_PS_UART is not set +CONFIG_SERIAL_EFM32_UART=y +CONFIG_SERIAL_EFM32_UART_CONSOLE=y +# CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_FSL_LPUART is not set +# CONFIG_SERIAL_ST_ASC is not set +# CONFIG_TTY_PRINTK is not set +# CONFIG_HVC_DCC is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +# CONFIG_I2C_MUX is not set +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CBUS_GPIO is not set +# CONFIG_I2C_DESIGNWARE_PLATFORM is not set +CONFIG_I2C_EFM32=y +CONFIG_I2C_GPIO=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_PXA_PCI is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_XILINX is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_ALTERA is not set +CONFIG_SPI_BITBANG=y +CONFIG_SPI_EFM32=y +# CONFIG_SPI_GPIO is not set +# CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_FSL_DSPI is not set +# CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PXA2XX_PCI is not set +# CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_XCOMM is not set +# CONFIG_SPI_XILINX is not set +# CONFIG_SPI_DESIGNWARE is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_HSI is not set + +# +# PPS support +# +# CONFIG_PPS is not set + +# +# PPS generators support +# + +# +# PTP clock support +# +# CONFIG_PTP_1588_CLOCK is not set + +# +# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. +# +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIO_DEVRES=y +CONFIG_GPIOLIB=y +CONFIG_OF_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO drivers: +# +# CONFIG_GPIO_GENERIC_PLATFORM is not set +CONFIG_GPIO_EFM32=y +# CONFIG_GPIO_EM is not set +# CONFIG_GPIO_RCAR is not set +# CONFIG_GPIO_TS5500 is not set +# CONFIG_GPIO_GRGPIO is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX7300 is not set +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCF857X is not set +# CONFIG_GPIO_SX150X is not set +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_ADNP is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set +# CONFIG_GPIO_74X164 is not set + +# +# AC97 GPIO expanders: +# + +# +# LPC GPIO expanders: +# + +# +# MODULbus GPIO expanders: +# + +# +# USB GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_POWER_AVS is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Native drivers +# +# CONFIG_SENSORS_AD7314 is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7310 is not set +# CONFIG_SENSORS_ADT7410 is not set +# CONFIG_SENSORS_ADT7411 is not set +# CONFIG_SENSORS_ADT7462 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS620 is not set +# CONFIG_SENSORS_DS1621 is not set +CONFIG_SENSORS_EFM32_ADC=y +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_GPIO_FAN is not set +# CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_HTU21 is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_JC42 is not set +# CONFIG_SENSORS_LINEAGE is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM73 is not set +CONFIG_SENSORS_LM75=y +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LM95234 is not set +# CONFIG_SENSORS_LM95241 is not set +# CONFIG_SENSORS_LM95245 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_PMBUS is not set +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_EMC1403 is not set +# CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC6W201 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SCH56XX_COMMON is not set +# CONFIG_SENSORS_ADS1015 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_ADS7871 is not set +# CONFIG_SENSORS_AMC6821 is not set +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_TMP102 is not set +# CONFIG_SENSORS_TMP401 is not set +# CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83795 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set +CONFIG_BCMA_POSSIBLE=y + +# +# Broadcom specific AMBA +# +# CONFIG_BCMA is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_CORE=y +# CONFIG_MFD_AS3711 is not set +# CONFIG_PMIC_ADP5520 is not set +# CONFIG_MFD_AAT2870_CORE is not set +# CONFIG_MFD_CROS_EC is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_DA9052_SPI is not set +# CONFIG_MFD_DA9052_I2C is not set +# CONFIG_MFD_DA9055 is not set +# CONFIG_MFD_DA9063 is not set +# CONFIG_MFD_MC13XXX_SPI is not set +# CONFIG_MFD_MC13XXX_I2C is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_HTC_I2CPLD is not set +# CONFIG_MFD_KEMPLD is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX77693 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_MAX8925 is not set +# CONFIG_MFD_MAX8997 is not set +# CONFIG_MFD_MAX8998 is not set +# CONFIG_EZX_PCAP is not set +# CONFIG_MFD_RETU is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RC5T583 is not set +# CONFIG_MFD_SEC_CORE is not set +# CONFIG_MFD_SI476X_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_SMSC is not set +# CONFIG_ABX500_CORE is not set +# CONFIG_MFD_STMPE is not set +# CONFIG_MFD_SYSCON is not set +# CONFIG_MFD_TI_AM335X_TSCADC is not set +# CONFIG_MFD_LP8788 is not set +# CONFIG_MFD_PALMAS is not set +# CONFIG_TPS6105X is not set +# CONFIG_TPS65010 is not set +# CONFIG_TPS6507X is not set +# CONFIG_MFD_TPS65090 is not set +# CONFIG_MFD_TPS65217 is not set +# CONFIG_MFD_TPS6586X is not set +# CONFIG_MFD_TPS65910 is not set +# CONFIG_MFD_TPS65912 is not set +# CONFIG_MFD_TPS65912_I2C is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS80031 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_TWL6040_CORE is not set +# CONFIG_MFD_WL1273_CORE is not set +# CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TC3589X is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_ARIZONA_I2C is not set +# CONFIG_MFD_ARIZONA_SPI is not set +CONFIG_MFD_EFM32BOARD=y +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X_I2C is not set +# CONFIG_MFD_WM831X_SPI is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_WM8994 is not set +# CONFIG_VEXPRESS_CONFIG is not set +# CONFIG_REGULATOR is not set +# CONFIG_MEDIA_SUPPORT is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_TMIO is not set +# CONFIG_FB_GOLDFISH is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_BROADSHEET is not set +# CONFIG_FB_AUO_K190X is not set +CONFIG_FB_SIMPLE=y +# CONFIG_EXYNOS_VIDEO is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +# CONFIG_LOGO is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_SOUND is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SUPPORT is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set +# CONFIG_MMC_CLKGATE is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +CONFIG_MMC_TEST=y + +# +# MMC/SD/SDIO Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_SDHCI_PXAV3 is not set +# CONFIG_MMC_SDHCI_PXAV2 is not set +CONFIG_MMC_SPI=y +# CONFIG_MMC_DW is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_VIRT_DRIVERS is not set + +# +# Virtio drivers +# +# CONFIG_VIRTIO_MMIO is not set + +# +# Microsoft Hyper-V guest support +# +# CONFIG_STAGING is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_COMMON_CLK=y + +# +# Common Clock Framework +# +CONFIG_COMMON_CLK_DEBUG=y +# CONFIG_COMMON_CLK_SI5351 is not set + +# +# Hardware Spinlock drivers +# +CONFIG_CLKSRC_OF=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLKSRC_EFM32=y +# CONFIG_MAILBOX is not set +# CONFIG_IOMMU_SUPPORT is not set + +# +# Remoteproc drivers +# +# CONFIG_STE_MODEM_RPROC is not set + +# +# Rpmsg drivers +# +# CONFIG_PM_DEVFREQ is not set +# CONFIG_EXTCON is not set +# CONFIG_MEMORY is not set +# CONFIG_IIO is not set +# CONFIG_PWM is not set +CONFIG_IRQCHIP=y +CONFIG_ARM_NVIC=y +# CONFIG_IPACK_BUS is not set +# CONFIG_RESET_CONTROLLER is not set +# CONFIG_FMC is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_FILE_LOCKING is not set +# CONFIG_FSNOTIFY is not set +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY_USER is not set +# CONFIG_FANOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_QUOTACTL is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_LOGFS is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +CONFIG_ROMFS_FS=y +# CONFIG_ROMFS_BACKED_BY_BLOCK is not set +CONFIG_ROMFS_BACKED_BY_MTD=y +# CONFIG_ROMFS_BACKED_BY_BOTH is not set +CONFIG_ROMFS_ON_MTD=y +# CONFIG_PSTORE is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +# CONFIG_NLS is not set + +# +# Kernel hacking +# + +# +# printk and dmesg options +# +CONFIG_PRINTK_TIME=y +CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_DYNAMIC_DEBUG is not set + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_INFO_REDUCED is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_READABLE_ASM is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_SECTION_MISMATCH is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y + +# +# Memory Debugging +# +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_STATS is not set +CONFIG_HAVE_DEBUG_KMEMLEAK=y +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_NOMMU_REGIONS is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_SHIRQ is not set + +# +# Debug Lockups and Hangs +# +# CONFIG_LOCKUP_DETECTOR is not set +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_PANIC_ON_OOPS is not set +CONFIG_PANIC_ON_OOPS_VALUE=0 +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +CONFIG_DEBUG_PREEMPT=y + +# +# Lock Debugging (spinlocks, mutexes, etc...) +# +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_KOBJECT_RELEASE is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set + +# +# RCU Debugging +# +# CONFIG_PROVE_RCU_DELAY is not set +# CONFIG_SPARSE_RCU_POINTER is not set +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_RCU_CPU_STALL_VERBOSE=y +# CONFIG_RCU_CPU_STALL_INFO is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_NOTIFIER_ERROR_INJECTION is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set + +# +# Runtime Testing +# +# CONFIG_LKDTM is not set +# CONFIG_TEST_LIST_SORT is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_RBTREE_TEST is not set +# CONFIG_ATOMIC64_SELFTEST is not set +# CONFIG_TEST_STRING_HELPERS is not set +# CONFIG_TEST_KSTRTOX is not set +# CONFIG_DMA_API_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_LL_UART_NONE is not set +# CONFIG_DEBUG_ICEDCC is not set +# CONFIG_DEBUG_SEMIHOSTING is not set +# CONFIG_DEBUG_LL_UART_8250 is not set +CONFIG_DEBUG_LL_UART_EFM32=y +# CONFIG_DEBUG_LL_UART_PL01X is not set +CONFIG_DEBUG_LL_INCLUDE="debug/efm32.S" +# CONFIG_DEBUG_UART_PL01X is not set +# CONFIG_DEBUG_UART_8250 is not set +CONFIG_DEBUG_UART_PHYS=0x4000e400 +CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h" +CONFIG_EARLY_PRINTK=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY_DMESG_RESTRICT is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +CONFIG_DEFAULT_SECURITY_DAC=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_USER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_CMAC is not set +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CRC32 is not set +# CONFIG_CRYPTO_CRCT10DIF is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA1_ARM is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_ARM is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_LZ4 is not set +# CONFIG_CRYPTO_LZ4HC is not set + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=y +# CONFIG_CRYPTO_USER_API_HASH is not set +# CONFIG_CRYPTO_USER_API_SKCIPHER is not set +CONFIG_CRYPTO_HW=y +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_NET_UTILS=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_IO=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC32_SELFTEST is not set +CONFIG_CRC32_SLICEBY8=y +# CONFIG_CRC32_SLICEBY4 is not set +# CONFIG_CRC32_SARWATE is not set +# CONFIG_CRC32_BIT is not set +CONFIG_CRC7=y +# CONFIG_LIBCRC32C is not set +# CONFIG_CRC8 is not set +# CONFIG_XZ_DEC is not set +# CONFIG_XZ_DEC_BCJ is not set +CONFIG_HAS_IOMEM=y +CONFIG_HAS_DMA=y +CONFIG_DQL=y +CONFIG_NLATTR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +# CONFIG_AVERAGE is not set +# CONFIG_CORDIC is not set +# CONFIG_DDR is not set +# CONFIG_VIRTUALIZATION is not set diff --git a/patches/linux-3.11-rc1/0001-ARM-ARMv7-M-Fix-name-of-NVIC-handler-function.patch b/patches/linux-3.11-rc1/0001-ARM-ARMv7-M-Fix-name-of-NVIC-handler-function.patch deleted file mode 100644 index 41e081b..0000000 --- a/patches/linux-3.11-rc1/0001-ARM-ARMv7-M-Fix-name-of-NVIC-handler-function.patch +++ /dev/null @@ -1,29 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Wed, 26 Jun 2013 09:52:21 +0200 -Subject: [PATCH] ARM: ARMv7-M: Fix name of NVIC handler function -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The name changed in response to review comments for the nvic irqchip -driver when the original name was already accepted into Russell King's -tree. - -Signed-off-by: Uwe Kleine-König ---- - arch/arm/kernel/entry-v7m.S | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S -index e00621f..52b2643 100644 ---- a/arch/arm/kernel/entry-v7m.S -+++ b/arch/arm/kernel/entry-v7m.S -@@ -49,7 +49,7 @@ __irq_entry: - mov r1, sp - stmdb sp!, {lr} - @ routine called with r0 = irq number, r1 = struct pt_regs * -- bl nvic_do_IRQ -+ bl nvic_handle_irq - - pop {lr} - @ diff --git a/patches/linux-3.11-rc1/0002-hwmon-efm32-adc-new-driver.patch b/patches/linux-3.11-rc1/0002-hwmon-efm32-adc-new-driver.patch deleted file mode 100644 index faadf1f..0000000 --- a/patches/linux-3.11-rc1/0002-hwmon-efm32-adc-new-driver.patch +++ /dev/null @@ -1,357 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Thu, 9 Feb 2012 22:35:24 +0100 -Subject: [PATCH] hwmon/efm32-adc: new driver -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Uwe Kleine-König ---- - drivers/hwmon/Kconfig | 10 ++ - drivers/hwmon/Makefile | 1 + - drivers/hwmon/efm32-adc.c | 303 ++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 314 insertions(+) - create mode 100644 drivers/hwmon/efm32-adc.c - -diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index e989f7f..4ca9a64 100644 ---- a/drivers/hwmon/Kconfig -+++ b/drivers/hwmon/Kconfig -@@ -382,6 +382,16 @@ config SENSORS_DA9055 - This driver can also be built as a module. If so, the module - will be called da9055-hwmon. - -+config SENSORS_EFM32_ADC -+ tristate "Energy Micro EFM32 ADC" -+ depends on ARCH_EFM32 -+ help -+ If you say yes here you get support for Energy Micro's ADC -+ build into their EFM32 SoCs -+ -+ This driver can also be built as a module. If so, the module -+ will be called efm32-adc. -+ - config SENSORS_I5K_AMB - tristate "FB-DIMM AMB temperature sensor on Intel 5000 series chipsets" - depends on PCI -diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile -index 4f0fb52..311d9f9 100644 ---- a/drivers/hwmon/Makefile -+++ b/drivers/hwmon/Makefile -@@ -51,6 +51,7 @@ obj-$(CONFIG_SENSORS_DA9055)+= da9055-hwmon.o - obj-$(CONFIG_SENSORS_DME1737) += dme1737.o - obj-$(CONFIG_SENSORS_DS620) += ds620.o - obj-$(CONFIG_SENSORS_DS1621) += ds1621.o -+obj-$(CONFIG_SENSORS_EFM32_ADC) += efm32-adc.o - obj-$(CONFIG_SENSORS_EMC1403) += emc1403.o - obj-$(CONFIG_SENSORS_EMC2103) += emc2103.o - obj-$(CONFIG_SENSORS_EMC6W201) += emc6w201.o -diff --git a/drivers/hwmon/efm32-adc.c b/drivers/hwmon/efm32-adc.c -new file mode 100644 -index 0000000..99d6b45 ---- /dev/null -+++ b/drivers/hwmon/efm32-adc.c -@@ -0,0 +1,303 @@ -+/* -+ * Energy Micro EFM32 adc -+ * -+ * Copyright (C) 2012 Uwe Kleine-Koenig for Pengutronix -+ * -+ * This program is free software; you can redistribute it and/or modify it under -+ * the terms of the GNU General Public License version 2 as published by the -+ * Free Software Foundation. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DRIVER_NAME "efm32-adc" -+ -+#define ADC_CTRL 0x000 -+ -+#define ADC_CMD 0x004 -+#define ADC_CMD_SINGLESTART 0x00000001 -+#define ADC_CMD_SINGLESTOP 0x00000002 -+#define ADC_CMD_SCANSTART 0x00000004 -+#define ADC_CMD_SCANSTOP 0x00000008 -+ -+#define ADC_STATUS 0x008 -+#define ADC_STATUS_SINGLEDV 0x00010000 -+#define ADC_SINGLECTRL 0x00c -+#define ADC_SINGLEDATA 0x024 -+ -+#define ADC_IEN 0x014 -+#define ADC_IF 0x018 -+#define ADC_IFC 0x020 -+#define ADC_IF_SINGLE 0x00000001 -+ -+struct efm32_adc_ddata { -+ struct device *hwmondev; -+ void __iomem *base; -+ struct clk *clk; -+ unsigned int irq; -+ spinlock_t lock; -+ unsigned int busy; -+}; -+ -+static void efm32_adc_write32(struct efm32_adc_ddata *ddata, -+ u32 value, unsigned offset) -+{ -+ writel_relaxed(value, ddata->base + offset); -+} -+ -+static u32 efm32_adc_read32(struct efm32_adc_ddata *ddata, unsigned offset) -+{ -+ return readl_relaxed(ddata->base + offset); -+} -+ -+static ssize_t efm32_adc_show_name(struct device *dev, -+ struct device_attribute *devattr, char *buf) -+{ -+ return sprintf(buf, "efm32\n"); -+} -+ -+struct efm32_adc_irqdata { -+ struct efm32_adc_ddata *ddata; -+ struct completion done; -+}; -+ -+static irqreturn_t efm32_adc_irq(int irq, void *data) -+{ -+ struct efm32_adc_irqdata *irqdata = data; -+ u32 iflag = efm32_adc_read32(irqdata->ddata, ADC_IF); -+ -+ if (iflag & ADC_IF_SINGLE) { -+ efm32_adc_write32(irqdata->ddata, ADC_IF_SINGLE, ADC_IFC); -+ complete(&irqdata->done); -+ return IRQ_HANDLED; -+ } -+ -+ return IRQ_NONE; -+} -+ -+static int efm32_adc_read_single(struct device *dev, -+ struct device_attribute *devattr, unsigned int *val) -+{ -+ struct platform_device *pdev = to_platform_device(dev); -+ struct efm32_adc_ddata *ddata = platform_get_drvdata(pdev); -+ int ret; -+ struct efm32_adc_irqdata irqdata = { .ddata = ddata, }; -+ u32 status; -+ unsigned long freq = clk_get_rate(ddata->clk); -+ -+ init_completion(&irqdata.done); -+ -+ spin_lock_irq(&ddata->lock); -+ if (ddata->busy) { -+ ret = -EBUSY; -+ goto out_unlock; -+ } -+ -+ /* XXX: this depends on CMU_HFPERCLKEN0.ADC being on. */ -+ efm32_adc_write32(ddata, -+ ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP, ADC_CMD); -+ efm32_adc_write32(ddata, ((freq - 1) / 1000000) << 16 | -+ ((freq / 400000) - 1) << 8, ADC_CTRL); -+ efm32_adc_write32(ddata, 0x800, ADC_SINGLECTRL); -+ efm32_adc_write32(ddata, ADC_IF_SINGLE, ADC_IFC); -+ efm32_adc_write32(ddata, ADC_CMD_SINGLESTART, ADC_CMD); -+ -+ ret = request_irq(ddata->irq, efm32_adc_irq, 0, DRIVER_NAME, &irqdata); -+ if (ret) { -+ efm32_adc_write32(ddata, ADC_CMD_SINGLESTOP, ADC_CMD); -+ goto out_unlock; -+ } -+ -+ efm32_adc_write32(ddata, ADC_IF_SINGLE, ADC_IEN); -+ -+ ddata->busy = 1; -+ -+ spin_unlock_irq(&ddata->lock); -+ -+ ret = wait_for_completion_interruptible_timeout(&irqdata.done, 2 * HZ); -+ -+ spin_lock_irq(&ddata->lock); -+ -+ efm32_adc_write32(ddata, 0, ADC_IEN); -+ free_irq(ddata->irq, &irqdata); -+ -+ if (ret < 0) -+ goto done_out_unlock; -+ -+ status = efm32_adc_read32(ddata, ADC_STATUS); -+ if (status & ADC_STATUS_SINGLEDV) { -+ *val = efm32_adc_read32(ddata, ADC_SINGLEDATA); -+ ret = 0; -+ } else -+ ret = -ETIMEDOUT; -+ -+done_out_unlock: -+ ddata->busy = 0; -+out_unlock: -+ spin_unlock_irq(&ddata->lock); -+ -+ return ret; -+} -+ -+static ssize_t efm32_adc_read_chan(struct device *dev, -+ struct device_attribute *devattr, char *buf) -+{ -+ unsigned int val; -+ int ret = efm32_adc_read_single(dev, devattr, &val); -+ -+ if (ret) -+ return ret; -+ -+ return sprintf(buf, "%u\n", val); -+} -+ -+static ssize_t efm32_adc_read_temp(struct device *dev, -+ struct device_attribute *devattr, char *buf) -+{ -+ unsigned int val; -+ int ret = efm32_adc_read_single(dev, devattr, &val); -+ /* -+ * XXX: get these via pdata or read them from the device information -+ * registers -+ */ -+ unsigned temp0 = 0x19 * 1000; -+ unsigned adc0 = 0x910; -+ -+ if (ret) -+ return ret; -+ -+ val = temp0 + DIV_ROUND_CLOSEST((adc0 - val) * 10000, 63); -+ -+ return sprintf(buf, "%u\n", val); -+} -+ -+static DEVICE_ATTR(name, S_IRUGO, efm32_adc_show_name, NULL); -+static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, efm32_adc_read_chan, NULL, 8); -+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, efm32_adc_read_temp, NULL, 8); -+ -+static struct attribute *efm32_adc_attr[] = { -+ &dev_attr_name.attr, -+ &sensor_dev_attr_in8_input.dev_attr.attr, -+ &sensor_dev_attr_temp1_input.dev_attr.attr, -+ NULL -+}; -+ -+static const struct attribute_group efm32_adc_group = { -+ .attrs = efm32_adc_attr, -+}; -+ -+static int efm32_adc_probe(struct platform_device *pdev) -+{ -+ struct efm32_adc_ddata *ddata; -+ struct resource *res; -+ int ret; -+ -+ ddata = kzalloc(sizeof(*ddata), GFP_KERNEL); -+ if (!ddata) -+ return -ENOMEM; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) { -+ ret = -ENXIO; -+ dev_dbg(&pdev->dev, "failed to determine base address\n"); -+ goto err_get_base; -+ } -+ -+ ret = platform_get_irq(pdev, 0); -+ if (ret <= 0) { -+ ret = -ENXIO; -+ dev_dbg(&pdev->dev, "failed to determine irq\n"); -+ goto err_get_irq; -+ } -+ ddata->irq = ret; -+ -+ ddata->base = ioremap(res->start, resource_size(res)); -+ if (!ddata->base) { -+ ret = -ENOMEM; -+ dev_dbg(&pdev->dev, "failed to remap\n"); -+ goto err_ioremap; -+ } -+ -+ ddata->clk = clk_get(&pdev->dev, NULL); -+ if (IS_ERR(ddata->clk)) { -+ ret = PTR_ERR(ddata->clk); -+ dev_dbg(&pdev->dev, "failed to get clock\n"); -+ goto err_clk_get; -+ } -+ -+ platform_set_drvdata(pdev, ddata); -+ spin_lock_init(&ddata->lock); -+ -+ ret = sysfs_create_group(&pdev->dev.kobj, &efm32_adc_group); -+ if (ret) -+ goto err_create_group; -+ -+ ddata->hwmondev = hwmon_device_register(&pdev->dev); -+ if (IS_ERR(ddata->hwmondev)) { -+ ret = PTR_ERR(ddata->hwmondev); -+ -+ sysfs_remove_group(&pdev->dev.kobj, &efm32_adc_group); -+err_create_group: -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ clk_put(ddata->clk); -+err_clk_get: -+ -+ iounmap(ddata->base); -+err_ioremap: -+err_get_irq: -+err_get_base: -+ kfree(ddata); -+ } -+ -+ return ret; -+} -+ -+static int efm32_adc_remove(struct platform_device *pdev) -+{ -+ struct efm32_adc_ddata *ddata = platform_get_drvdata(pdev); -+ -+ hwmon_device_unregister(ddata->hwmondev); -+ sysfs_remove_group(&pdev->dev.kobj, &efm32_adc_group); -+ platform_set_drvdata(pdev, NULL); -+ clk_put(ddata->clk); -+ iounmap(ddata->base); -+ kfree(ddata); -+ -+ return 0; -+} -+ -+static const struct of_device_id efm32_adc_dt_ids[] = { -+ { -+ .compatible = "efm32,adc", -+ }, { -+ /* sentinel */ -+ } -+}; -+MODULE_DEVICE_TABLE(of, efm32_adc_dt_ids); -+ -+static struct platform_driver efm32_adc_driver = { -+ .probe = efm32_adc_probe, -+ .remove = efm32_adc_remove, -+ .driver = { -+ .name = DRIVER_NAME, -+ .owner = THIS_MODULE, -+ .of_match_table = efm32_adc_dt_ids, -+ }, -+}; -+module_platform_driver(efm32_adc_driver); -+ -+MODULE_AUTHOR("Uwe Kleine-Koenig "); -+MODULE_DESCRIPTION("EFM32 ADC driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:" DRIVER_NAME); diff --git a/patches/linux-3.11-rc1/0003-spi-new-controller-driver-for-efm32-SoCs.patch b/patches/linux-3.11-rc1/0003-spi-new-controller-driver-for-efm32-SoCs.patch deleted file mode 100644 index 7f4c88c..0000000 --- a/patches/linux-3.11-rc1/0003-spi-new-controller-driver-for-efm32-SoCs.patch +++ /dev/null @@ -1,533 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Thu, 23 Feb 2012 10:44:35 +0100 -Subject: [PATCH] spi: new controller driver for efm32 SoCs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -known issues: - efm32-spi efm32-spi.1: master is unqueued, this is deprecated - -Signed-off-by: Uwe Kleine-König ---- - drivers/spi/Kconfig | 5 + - drivers/spi/Makefile | 1 + - drivers/spi/spi-efm32.c | 481 ++++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 487 insertions(+) - create mode 100644 drivers/spi/spi-efm32.c - -diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig -index 89cbbab..6a273d3 100644 ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -157,6 +157,11 @@ config SPI_DAVINCI - help - SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. - -+config SPI_EFM32 -+ tristate "EFM32 SPI controller" -+ depends on ARCH_EFM32 -+ select SPI_BITBANG -+ - config SPI_EP93XX - tristate "Cirrus Logic EP93xx SPI controller" - depends on ARCH_EP93XX -diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile -index 33f9c09..4a1cfb2 100644 ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -27,6 +27,7 @@ obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw.o - obj-$(CONFIG_SPI_DW_MMIO) += spi-dw-mmio.o - obj-$(CONFIG_SPI_DW_PCI) += spi-dw-midpci.o - spi-dw-midpci-objs := spi-dw-pci.o spi-dw-mid.o -+obj-$(CONFIG_SPI_EFM32) += spi-efm32.o - obj-$(CONFIG_SPI_EP93XX) += spi-ep93xx.o - obj-$(CONFIG_SPI_FALCON) += spi-falcon.o - obj-$(CONFIG_SPI_FSL_CPM) += spi-fsl-cpm.o -diff --git a/drivers/spi/spi-efm32.c b/drivers/spi/spi-efm32.c -new file mode 100644 -index 0000000..f20b36b ---- /dev/null -+++ b/drivers/spi/spi-efm32.c -@@ -0,0 +1,481 @@ -+/* -+ * Copyright (C) 2012 Uwe Kleine-Koenig for Pengutronix -+ * -+ * This program is free software; you can redistribute it and/or modify it under -+ * the terms of the GNU General Public License version 2 as published by the -+ * Free Software Foundation. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DRIVER_NAME "efm32-spi" -+ -+#define REG_CTRL 0x00 -+#define REG_CTRL_SYNC 0x0001 -+#define REG_CTRL_CLKPOL 0x0100 -+#define REG_CTRL_CLKPHA 0x0200 -+#define REG_CTRL_MSBF 0x0400 -+#define REG_CTRL_TXBIL 0x1000 -+ -+#define REG_FRAME 0x04 -+#define REG_FRAME_DATABITS__MASK 0x000f -+#define REG_FRAME_DATABITS(n) ((n) - 3) -+ -+#define REG_CMD 0x0c -+#define REG_CMD_RXEN 0x0001 -+#define REG_CMD_RXDIS 0x0002 -+#define REG_CMD_TXEN 0x0004 -+#define REG_CMD_TXDIS 0x0008 -+#define REG_CMD_MASTEREN 0x0010 -+ -+#define REG_STATUS 0x10 -+#define REG_STATUS_TXENS 0x0002 -+#define REG_STATUS_TXC 0x0020 -+#define REG_STATUS_TXBL 0x0040 -+#define REG_STATUS_RXDATAV 0x0080 -+ -+#define REG_CLKDIV 0x14 -+ -+#define REG_RXDATAX 0x18 -+#define REG_RXDATAX_RXDATA__MASK 0x01ff -+#define REG_RXDATAX_PERR 0x4000 -+#define REG_RXDATAX_FERR 0x8000 -+ -+#define REG_TXDATA 0x34 -+ -+#define REG_IF 0x40 -+#define REG_IF_TXBL 0x0002 -+#define REG_IF_RXDATAV 0x0004 -+ -+#define REG_IFS 0x44 -+#define REG_IFC 0x48 -+#define REG_IEN 0x4c -+ -+#define REG_ROUTE 0x54 -+#define REG_ROUTE_RXPEN 0x0001 -+#define REG_ROUTE_TXPEN 0x0002 -+#define REG_ROUTE_CLKPEN 0x0008 -+#define REG_ROUTE_LOCATION__MASK 0x0700 -+#define REG_ROUTE_LOCATION(n) (((n) << 8) & REG_ROUTE_LOCATION__MASK) -+ -+struct efm32_spi_ddata { -+ /* bitbang must be the first member */ -+ struct spi_bitbang bitbang; -+ -+ spinlock_t lock; -+ -+ struct clk *clk; -+ void __iomem *base; -+ unsigned int rxirq, txirq; -+ -+ /* irq data */ -+ struct completion done; -+ const void *tx_buf; -+ void *rx_buf; -+ unsigned tx_len, rx_len; -+ unsigned csgpio[]; -+}; -+ -+static void efm32_spi_write32(struct efm32_spi_ddata *ddata, -+ u32 value, unsigned offset) -+{ -+ writel_relaxed(value, ddata->base + offset); -+} -+ -+static u32 efm32_spi_read32(struct efm32_spi_ddata *ddata, unsigned offset) -+{ -+ return readl_relaxed(ddata->base + offset); -+} -+ -+static int efm32_spi_setup(struct spi_device *spi) -+{ -+ pr_debug("%s\n", __func__); -+ -+ return 0; -+ -+} -+ -+static void efm32_spi_cleanup(struct spi_device *spi) -+{ -+ pr_debug("%s\n", __func__); -+} -+ -+static void efm32_spi_chipselect(struct spi_device *spi, int is_on) -+{ -+ struct efm32_spi_ddata *ddata = spi_master_get_devdata(spi->master); -+ int value = !(spi->mode & SPI_CS_HIGH) == !(is_on == BITBANG_CS_ACTIVE); -+ -+ gpio_set_value(ddata->csgpio[spi->chip_select], value); -+} -+ -+static int efm32_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) -+{ -+ struct efm32_spi_ddata *ddata = spi_master_get_devdata(spi->master); -+ -+ unsigned bpw = t && t->bits_per_word ? -+ t->bits_per_word : spi->bits_per_word; -+ unsigned speed = t && t->speed_hz ? t->speed_hz : spi->max_speed_hz; -+ unsigned long clkfreq = clk_get_rate(ddata->clk); -+ u32 clkdiv; -+ -+ efm32_spi_write32(ddata, REG_CTRL_SYNC | REG_CTRL_MSBF | -+ (spi->mode & SPI_CPHA ? REG_CTRL_CLKPHA : 0) | -+ (spi->mode & SPI_CPOL ? REG_CTRL_CLKPOL : 0), REG_CTRL); -+ -+ efm32_spi_write32(ddata, -+ REG_FRAME_DATABITS(bpw), REG_FRAME); -+ /* XXX */ -+ if (2 * speed >= clkfreq) -+ clkdiv = 0; -+ else -+ clkdiv = 64 * (DIV_ROUND_UP(2 * clkfreq, speed) - 4); -+ -+ if (clkdiv > (1U << 21)) -+ return -EINVAL; -+ -+ efm32_spi_write32(ddata, clkdiv, REG_CLKDIV); -+ efm32_spi_write32(ddata, REG_CMD_MASTEREN, REG_CMD); -+ efm32_spi_write32(ddata, REG_CMD_RXEN | REG_CMD_TXEN, REG_CMD); -+ -+ return 0; -+} -+ -+#define DEFINE_EFM32_SPI_XFER(type) \ -+static void efm32_spi_tx_ ## type(struct efm32_spi_ddata *ddata) \ -+{ \ -+ type val = 0; \ -+ \ -+ if (ddata->tx_len >= sizeof(type)) { \ -+ if (ddata->tx_buf) { \ -+ val = *(type *)ddata->tx_buf; \ -+ ddata->tx_buf += sizeof(type); \ -+ } \ -+ \ -+ ddata->tx_len -= sizeof(type); \ -+ efm32_spi_write32(ddata, val, REG_TXDATA); \ -+ pr_debug("%s: tx 0x%x\n", __func__, val); \ -+ } \ -+} \ -+ \ -+static void efm32_spi_rx_ ## type(struct efm32_spi_ddata *ddata) \ -+{ \ -+ if (ddata->rx_len >= sizeof(type)) { \ -+ u32 rxdata = efm32_spi_read32(ddata, REG_RXDATAX); \ -+ pr_debug("%s: rx 0x%x\n", __func__, rxdata); \ -+ \ -+ if (ddata->rx_buf) { \ -+ *(type *)ddata->rx_buf = rxdata; \ -+ ddata->rx_buf += sizeof(type); \ -+ } \ -+ \ -+ ddata->rx_len -= sizeof(type); \ -+ } \ -+} -+ -+DEFINE_EFM32_SPI_XFER(u8) -+ -+static void efm32_spi_filltx(struct efm32_spi_ddata *ddata) -+{ -+ while (ddata->tx_len && -+ ddata->tx_len + 2 /* XXX * bpw */ > ddata->rx_len && -+ efm32_spi_read32(ddata, REG_STATUS) & REG_STATUS_TXBL) { -+ efm32_spi_tx_u8(ddata); -+ } -+} -+ -+static int efm32_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) -+{ -+ struct efm32_spi_ddata *ddata = spi_master_get_devdata(spi->master); -+ int ret = -EBUSY; -+ -+ spin_lock_irq(&ddata->lock); -+ -+ if (ddata->tx_buf || ddata->rx_buf) -+ goto out_unlock; -+ -+ ddata->tx_buf = t->tx_buf; -+ ddata->rx_buf = t->rx_buf; -+ ddata->tx_len = ddata->rx_len = t->len; -+ -+ efm32_spi_filltx(ddata); -+ -+ init_completion(&ddata->done); -+ -+ efm32_spi_write32(ddata, REG_IF_TXBL | REG_IF_RXDATAV, REG_IEN); -+ -+ spin_unlock_irq(&ddata->lock); -+ -+ wait_for_completion(&ddata->done); -+ -+ spin_lock_irq(&ddata->lock); -+ -+ ret = t->len - max(ddata->tx_len, ddata->rx_len); -+ -+ efm32_spi_write32(ddata, 0, REG_IEN); -+ ddata->tx_buf = ddata->rx_buf = NULL; -+ -+out_unlock: -+ spin_unlock_irq(&ddata->lock); -+ -+ return ret; -+} -+ -+static irqreturn_t efm32_spi_rxirq(int irq, void *data) -+{ -+ struct efm32_spi_ddata *ddata = data; -+ irqreturn_t ret = IRQ_NONE; -+ -+ spin_lock(&ddata->lock); -+ -+ while (ddata->rx_len > 0 && -+ efm32_spi_read32(ddata, REG_STATUS) & -+ REG_STATUS_RXDATAV) { -+ efm32_spi_rx_u8(ddata); -+ -+ ret = IRQ_HANDLED; -+ } -+ -+ if (!ddata->rx_len) { -+ u32 ien = efm32_spi_read32(ddata, REG_IEN); -+ -+ ien &= ~REG_IF_RXDATAV; -+ -+ efm32_spi_write32(ddata, ien, REG_IEN); -+ -+ complete(&ddata->done); -+ } -+ -+ spin_unlock(&ddata->lock); -+ -+ return ret; -+} -+ -+static irqreturn_t efm32_spi_txirq(int irq, void *data) -+{ -+ struct efm32_spi_ddata *ddata = data; -+ -+ pr_debug("%s: txlen = %u, rxlen = %u, if=0x%08x, status=0x%08x\n", -+ __func__, ddata->tx_len, ddata->rx_len, -+ efm32_spi_read32(ddata, REG_IF), -+ efm32_spi_read32(ddata, REG_STATUS)); -+ -+ spin_lock(&ddata->lock); -+ -+ efm32_spi_filltx(ddata); -+ -+ pr_debug("%s: txlen = %u, rxlen = %u\n", __func__, -+ ddata->tx_len, ddata->rx_len); -+ -+ if (!ddata->tx_len) { -+ u32 ien = efm32_spi_read32(ddata, REG_IEN); -+ -+ ien &= ~REG_IF_TXBL; -+ -+ efm32_spi_write32(ddata, ien, REG_IEN); -+ pr_debug("disable TXBL\n"); -+ } -+ -+ spin_unlock(&ddata->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+static int efm32_spi_probe(struct platform_device *pdev) -+{ -+ struct efm32_spi_ddata *ddata; -+ struct resource *res; -+ int ret; -+ struct spi_master *master; -+ struct device_node *np = pdev->dev.of_node; -+ unsigned int num_cs, i; -+ -+ num_cs = of_gpio_named_count(np, "cs-gpios"); -+ -+ master = spi_alloc_master(&pdev->dev, -+ sizeof(*ddata) + num_cs * sizeof(unsigned)); -+ if (!master) { -+ dev_dbg(&pdev->dev, -+ "failed to allocate spi master controller\n"); -+ return -ENOMEM; -+ } -+ platform_set_drvdata(pdev, master); -+ -+ master->dev.of_node = pdev->dev.of_node; -+ -+ master->bus_num = pdev->id; -+ master->num_chipselect = num_cs; -+ master->setup = efm32_spi_setup; -+ master->cleanup = efm32_spi_cleanup; -+ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; -+ -+ ddata = spi_master_get_devdata(master); -+ -+ ddata->bitbang.master = spi_master_get(master); -+ ddata->bitbang.chipselect = efm32_spi_chipselect; -+ ddata->bitbang.setup_transfer = efm32_spi_setup_transfer; -+ ddata->bitbang.txrx_bufs = efm32_spi_txrx_bufs; -+ -+ spin_lock_init(&ddata->lock); -+ -+ ddata->clk = clk_get(&pdev->dev, NULL); -+ if (IS_ERR(ddata->clk)) { -+ ret = PTR_ERR(ddata->clk); -+ dev_dbg(&pdev->dev, "failed to get clock: %d\n", ret); -+ goto err_clk_get; -+ } -+ -+ for (i = 0; i < num_cs; ++i) { -+ ret = of_get_named_gpio(np, "cs-gpios", i); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "failed to get csgpio#%u (%d)\n", -+ i, ret); -+ //goto err_get_csgpio; -+ } -+ ddata->csgpio[i] = ret; -+ dev_dbg(&pdev->dev, "csgpio#%u = %u\n", i, ddata->csgpio[i]); -+ ret = gpio_request_one(ddata->csgpio[i], -+ GPIOF_OUT_INIT_LOW, DRIVER_NAME); -+ if (ret < 0) { -+ dev_err(&pdev->dev, -+ "failed to configure csgpio#%u (%d)\n", -+ i, ret); -+ //goto err_csgpio_request; -+ } -+ } -+ -+ /* XXX: enable only on demand */ -+ ret = clk_prepare_enable(ddata->clk); -+ if (ret < 0) { -+ dev_dbg(&pdev->dev, "failed to enable clock: %d\n", ret); -+ goto err_clk_enable; -+ } -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) { -+ ret = -ENODEV; -+ dev_dbg(&pdev->dev, "failed to determine base address\n"); -+ goto err_get_base; -+ } -+ -+ if (resource_size(res) < 60) { -+ ret = -EINVAL; -+ dev_dbg(&pdev->dev, "memory resource too small\n"); -+ goto err_too_small; -+ } -+ -+ /* XXX: request_mem_region? */ -+ -+ ddata->base = ioremap(res->start, resource_size(res)); -+ if (!ddata->base) { -+ ret = -ENOMEM; -+ dev_dbg(&pdev->dev, "failed to remap memory\n"); -+ goto err_ioremap; -+ } -+ -+ ret = platform_get_irq(pdev, 0); -+ if (ret <= 0) { -+ dev_dbg(&pdev->dev, "failed to get rx irq\n"); -+ goto err_get_rxirq; -+ } -+ -+ ddata->rxirq = ret; -+ -+ ret = platform_get_irq(pdev, 1); -+ if (ret <= 0) -+ ret = ddata->rxirq + 1; -+ -+ ddata->txirq = ret; -+ -+ efm32_spi_write32(ddata, 0, REG_IEN); -+ efm32_spi_write32(ddata, REG_ROUTE_TXPEN | REG_ROUTE_RXPEN | -+ REG_ROUTE_CLKPEN | REG_ROUTE_LOCATION(1), REG_ROUTE); -+ -+ ret = request_irq(ddata->rxirq, efm32_spi_rxirq, 0, DRIVER_NAME, ddata); -+ if (ret) { -+ dev_dbg(&pdev->dev, "failed to register rxirq (%d)\n", ret); -+ goto err_request_rxirq; -+ } -+ -+ ret = request_irq(ddata->txirq, efm32_spi_txirq, 0, DRIVER_NAME, ddata); -+ if (ret) { -+ dev_dbg(&pdev->dev, "failed to register txirq (%d)\n", ret); -+ goto err_request_txirq; -+ } -+ -+ ret = spi_bitbang_start(&ddata->bitbang); -+ if (ret) { -+ dev_dbg(&pdev->dev, "spi_bitbang_start failed: %d\n", ret); -+ -+ free_irq(ddata->txirq, ddata); -+err_request_txirq: -+ -+ free_irq(ddata->rxirq, ddata); -+err_request_rxirq: -+err_get_rxirq: -+ iounmap(ddata->base); -+err_ioremap: -+err_too_small: -+err_get_base: -+ clk_disable_unprepare(ddata->clk); -+err_clk_enable: -+ clk_put(ddata->clk); -+err_clk_get: -+ platform_set_drvdata(pdev, NULL); -+ spi_master_put(master); -+ kfree(master); -+ } -+ -+ pr_debug("%s returns %d\n", __func__, ret); -+ return ret; -+} -+ -+static int efm32_spi_remove(struct platform_device *pdev) -+{ -+ struct spi_master *master = platform_get_drvdata(pdev); -+ struct efm32_spi_ddata *ddata = spi_master_get_devdata(master); -+ -+ free_irq(ddata->txirq, ddata); -+ free_irq(ddata->rxirq, ddata); -+ iounmap(ddata->base); -+ clk_put(ddata->clk); -+ platform_set_drvdata(pdev, NULL); -+ spi_master_put(master); -+ kfree(master); -+ -+ return 0; -+} -+ -+static const struct of_device_id efm32_spi_dt_ids[] = { -+ { -+ .compatible = "efm32,spi", -+ }, { -+ /* sentinel */ -+ } -+}; -+MODULE_DEVICE_TABLE(of, efm32_uart_dt_ids); -+ -+static struct platform_driver efm32_spi_driver = { -+ .probe = efm32_spi_probe, -+ .remove = efm32_spi_remove, -+ -+ .driver = { -+ .name = DRIVER_NAME, -+ .owner = THIS_MODULE, -+ .of_match_table = efm32_spi_dt_ids, -+ }, -+}; -+module_platform_driver(efm32_spi_driver); -+ -+MODULE_AUTHOR("Uwe Kleine-Koenig "); -+MODULE_DESCRIPTION("EFM32 SPI driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:" DRIVER_NAME); diff --git a/patches/linux-3.11-rc1/0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch b/patches/linux-3.11-rc1/0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch deleted file mode 100644 index 3e161f6..0000000 --- a/patches/linux-3.11-rc1/0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch +++ /dev/null @@ -1,843 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Thu, 17 Nov 2011 14:36:23 +0100 -Subject: [PATCH] ARM: new platform for Energy Micro's EFM32 Cortex-M3 SoCs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Uwe Kleine-König ---- - arch/arm/Kconfig | 15 +- - arch/arm/Kconfig.debug | 16 ++ - arch/arm/Makefile | 1 + - arch/arm/boot/dts/efm32gg-dk3750.dts | 126 +++++++++++ - arch/arm/mach-efm32/Makefile | 1 + - arch/arm/mach-efm32/Makefile.boot | 1 + - arch/arm/mach-efm32/clk.c | 88 ++++++++ - arch/arm/mach-efm32/cmu.h | 15 ++ - arch/arm/mach-efm32/common.h | 3 + - arch/arm/mach-efm32/dtmachine.c | 28 +++ - arch/arm/mach-efm32/include/mach/debug-macro.S | 48 ++++ - arch/arm/mach-efm32/include/mach/entry-macro.S | 9 + - arch/arm/mach-efm32/include/mach/io.h | 6 + - arch/arm/mach-efm32/include/mach/irqs.h | 6 + - arch/arm/mach-efm32/include/mach/system.h | 18 ++ - arch/arm/mach-efm32/include/mach/timex.h | 7 + - arch/arm/mach-efm32/time.c | 289 +++++++++++++++++++++++++ - 17 files changed, 676 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/boot/dts/efm32gg-dk3750.dts - create mode 100644 arch/arm/mach-efm32/Makefile - create mode 100644 arch/arm/mach-efm32/Makefile.boot - create mode 100644 arch/arm/mach-efm32/clk.c - create mode 100644 arch/arm/mach-efm32/cmu.h - create mode 100644 arch/arm/mach-efm32/common.h - create mode 100644 arch/arm/mach-efm32/dtmachine.c - create mode 100644 arch/arm/mach-efm32/include/mach/debug-macro.S - create mode 100644 arch/arm/mach-efm32/include/mach/entry-macro.S - create mode 100644 arch/arm/mach-efm32/include/mach/io.h - create mode 100644 arch/arm/mach-efm32/include/mach/irqs.h - create mode 100644 arch/arm/mach-efm32/include/mach/system.h - create mode 100644 arch/arm/mach-efm32/include/mach/timex.h - create mode 100644 arch/arm/mach-efm32/time.c - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index ba412e0..b8196cc 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -404,6 +404,19 @@ config ARCH_EBSA110 - Ethernet interface, two PCMCIA sockets, two serial ports and a - parallel port. - -+config ARCH_EFM32 -+ bool "Energy Micro Cortex M3 Platform" -+ depends on !MMU -+ select ARM_NVIC -+ select CLKSRC_MMIO -+ select COMMON_CLK -+ select CPU_V7M -+ select GENERIC_CLOCKEVENTS -+ select HAVE_CLK -+ select NO_DMA -+ select NO_IOPORT -+ select USE_OF -+ - config ARCH_EP93XX - bool "EP93xx-based" - select ARCH_HAS_HOLES_MEMORYMODEL -@@ -1763,7 +1776,7 @@ config FORCE_MAX_ZONEORDER - int "Maximum zone order" if ARCH_SHMOBILE - range 11 64 if ARCH_SHMOBILE - default "12" if SOC_AM33XX -- default "9" if SA1111 -+ default "9" if SA1111 || ARCH_EFM32 - default "11" - help - The kernel memory allocator divides physically contiguous memory -diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug -index e401a76..9f1b304 100644 ---- a/arch/arm/Kconfig.debug -+++ b/arch/arm/Kconfig.debug -@@ -167,6 +167,22 @@ choice - Say Y here if you want the debug print routines to direct - their output to the serial port in the DC21285 (Footbridge). - -+ config DEBUG_EFM32_USART1 -+ bool "Kernel low-level debugging messages via USART1" -+ depends on ARCH_EFM32 -+ help -+ Say Y here if you want the debug print routines to direct -+ their output to the second USART port on efm32 based -+ machines. -+ -+ config DEBUG_EFM32_UART1 -+ bool "Kernel low-level debugging messages via UART1" -+ depends on ARCH_EFM32 -+ help -+ Say Y here if you want the debug print routines to direct -+ their output to the second UART port on efm32 based -+ machines. -+ - config DEBUG_FOOTBRIDGE_COM1 - bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" - depends on FOOTBRIDGE -diff --git a/arch/arm/Makefile b/arch/arm/Makefile -index c0ac0f5..c632e2a 100644 ---- a/arch/arm/Makefile -+++ b/arch/arm/Makefile -@@ -152,6 +152,7 @@ machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx - machine-$(CONFIG_ARCH_DAVINCI) += davinci - machine-$(CONFIG_ARCH_DOVE) += dove - machine-$(CONFIG_ARCH_EBSA110) += ebsa110 -+machine-$(CONFIG_ARCH_EFM32) += efm32 - machine-$(CONFIG_ARCH_EP93XX) += ep93xx - machine-$(CONFIG_ARCH_GEMINI) += gemini - machine-$(CONFIG_ARCH_HIGHBANK) += highbank -diff --git a/arch/arm/boot/dts/efm32gg-dk3750.dts b/arch/arm/boot/dts/efm32gg-dk3750.dts -new file mode 100644 -index 0000000..10e8d94 ---- /dev/null -+++ b/arch/arm/boot/dts/efm32gg-dk3750.dts -@@ -0,0 +1,126 @@ -+/dts-v1/; -+/include/ "skeleton.dtsi" -+ -+/ { -+ model = "Energy Micro Giant Gecko Development Kit"; -+ compatible = "efm32,dk3750"; -+ -+ aliases { -+ serial4 = &uart4; -+ }; -+ -+ nvic: nv-interrupt-controller@0xe0000000 { -+ compatible = "arm,armv7m-nvic"; -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ reg = <0xe000e100 0xc00>; -+ }; -+ -+ chosen { -+ bootargs = "console=ttyefm4,115200 init=/linuxrc ignore_loglevel ihash_entries=64 dhash_entries=64 earlyprintk uclinux.physaddr=0x8c400000 root=/dev/mtdblock0"; -+ }; -+ -+ memory { -+ reg = <0x88000000 0x400000>; -+ }; -+ -+ soc { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "simple-bus"; -+ interrupt-parent = <&nvic>; -+ ranges; -+ -+ adc@0x40002000 { -+ compatible = "efm32,adc"; -+ reg = <0x40002000 0x400>; -+ interrupts = <7>; -+ status = "ok"; -+ }; -+ -+ gpio: gpio@0x40006000 { -+ compatible = "efm32,gpio"; -+ reg = <0x40006000 0x1000>; -+ interrupts = <1 11>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ clocks = <&cmu 32>; -+ status = "ok"; -+ }; -+ -+ spi@0x4000c400 { /* USART1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "efm32,spi"; -+ reg = <0x4000c400 0x400>; -+ interrupts = <15 16>; -+ clocks = <&cmu 20>; -+ cs-gpios = <&gpio 51 1>; // D3 -+ status = "ok"; -+ -+ ks8851@0 { -+ compatible = "ks8851"; -+ spi-max-frequency = <6000000>; -+ reg = <0>; -+ interrupt-parent = <&boardfpga>; -+ interrupts = <4>; -+ status = "ok"; -+ }; -+ }; -+ -+ uart4: uart@0x4000e400 { /* UART1 */ -+ compatible = "efm32,uart"; -+ reg = <0x4000e400 0x400>; -+ interrupts = <22 23>; -+ clocks = <&cmu 23>; -+ location = <2>; -+ status = "ok"; -+ }; -+ -+ timer0: timer@40010000 { -+ compatible = "efm32,timer"; -+ reg = <0x40010000 0x400>; -+ interrupts = <2>; -+ clocks = <&cmu 24>; -+ }; -+ -+ timer1: timer@40010400 { -+ compatible = "efm32,timer"; -+ reg = <0x40010400 0x400>; -+ interrupts = <12>; -+ clocks = <&cmu 25>; -+ }; -+ -+ timer2: timer@40010800 { -+ compatible = "efm32,timer"; -+ reg = <0x40010800 0x400>; -+ interrupts = <13>; -+ clocks = <&cmu 26>; -+ }; -+ -+ timer3: timer@40010c00 { -+ compatible = "efm32,timer"; -+ reg = <0x40010c00 0x400>; -+ interrupts = <14>; -+ clocks = <&cmu 27>; -+ }; -+ -+ cmu: cmu@400c8000 { -+ compatible = "efm32,cmu"; -+ reg = <0x400c8000 0x400>; -+ interrupts = <32>; -+ #clock-cells = <1>; -+ }; -+ -+ boardfpga: boardfpga@0x80000000 { -+ compatible = "efm32board"; -+ reg = <0x80000000 0x400>; -+ irq-gpios = <&gpio 64 1>; -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ status = "ok"; -+ }; -+ }; -+}; -diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile -new file mode 100644 -index 0000000..c6786a0 ---- /dev/null -+++ b/arch/arm/mach-efm32/Makefile -@@ -0,0 +1 @@ -+obj-y += clk.o dtmachine.o time.o -diff --git a/arch/arm/mach-efm32/Makefile.boot b/arch/arm/mach-efm32/Makefile.boot -new file mode 100644 -index 0000000..385e93a ---- /dev/null -+++ b/arch/arm/mach-efm32/Makefile.boot -@@ -0,0 +1 @@ -+dtb-$(CONFIG_MACH_EFM32GG_DK3750) += efm32gg-dk3750.dtb -diff --git a/arch/arm/mach-efm32/clk.c b/arch/arm/mach-efm32/clk.c -new file mode 100644 -index 0000000..f99719a ---- /dev/null -+++ b/arch/arm/mach-efm32/clk.c -@@ -0,0 +1,88 @@ -+#include -+#include -+#include -+#include -+#include -+ -+#include "cmu.h" -+ -+enum efm32_clks { -+ /* 0 */ hfxo, hfrco, lfxo, lfrco, ulfrco, auxhfrco, hfclknodiv, hfclk, -+ /* 8 */ hfperclk, hfcoreclk, lfaclk, lfbclk, wdogclk, hfcoreclkdma, -+ /* 14 */ hfcoreclkaes, hfcoreclkusbc, hfcoreclkusb, hfcoreclkle, -+ /* 18 */ hfcoreclkebi, hfperclkusart0, hfperclkusart1, hfperclkusart2, -+ /* 22 */ hfperclkuart0, hfperclkuart1, hfperclktimer0, hfperclktimer1, -+ /* 26 */ hfperclktimer2, hfperclktimer3, hfperclkacmp0, hfperclkacmp1, -+ /* 30 */ hfperclki2c0, hfperclki2c1, hfperclkgpio, hfperclkvcmp, -+ /* 34 */ hfperclkprs, hfperclkadc0, hfperclkdac0, clk_max -+}; -+ -+static struct clk *clk[clk_max]; -+static struct clk_onecell_data clk_data = { -+ .clks = clk, -+ .clk_num = ARRAY_SIZE(clk), -+}; -+ -+void __init efm32_clk_init(void) -+{ -+ int i; -+ struct device_node *np; -+ void __iomem *base; -+ -+ for (i = 0; i < clk_max; ++i) -+ clk[i] = ERR_PTR(-ENOENT); -+ -+ np = of_find_compatible_node(NULL, NULL, "efm32,cmu"); -+ if (!np) { -+ pr_warn("failed to find cmu node in device tree\n"); -+ return; -+ } -+ -+ base = of_iomap(np, 0); -+ if (!base) { -+ pr_warn("failed to map cmu\n"); -+ return; -+ } -+ -+ clk[hfxo] = clk_register_fixed_rate(NULL, "HFXO", NULL, -+ CLK_IS_ROOT, 48000000); -+ -+ clk[hfperclkusart0] = clk_register_gate(NULL, "HFPERCLK.USART0", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 0, 0, NULL); -+ clk[hfperclkusart1] = clk_register_gate(NULL, "HFPERCLK.USART1", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 1, 0, NULL); -+ clk[hfperclkusart2] = clk_register_gate(NULL, "HFPERCLK.USART2", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 2, 0, NULL); -+ clk[hfperclkuart0] = clk_register_gate(NULL, "HFPERCLK.UART0", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 3, 0, NULL); -+ clk[hfperclkuart1] = clk_register_gate(NULL, "HFPERCLK.UART1", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 4, 0, NULL); -+ clk[hfperclktimer0] = clk_register_gate(NULL, "HFPERCLK.TIMER0", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 5, 0, NULL); -+ clk[hfperclktimer1] = clk_register_gate(NULL, "HFPERCLK.TIMER1", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 6, 0, NULL); -+ clk[hfperclktimer2] = clk_register_gate(NULL, "HFPERCLK.TIMER2", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 7, 0, NULL); -+ clk[hfperclktimer3] = clk_register_gate(NULL, "HFPERCLK.TIMER3", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 8, 0, NULL); -+ clk[hfperclkacmp0] = clk_register_gate(NULL, "HFPERCLK.ACMP0", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 9, 0, NULL); -+ clk[hfperclkacmp1] = clk_register_gate(NULL, "HFPERCLK.ACMP1", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 10, 0, NULL); -+ clk[hfperclki2c0] = clk_register_gate(NULL, "HFPERCLK.I2C0", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 11, 0, NULL); -+ clk[hfperclki2c1] = clk_register_gate(NULL, "HFPERCLK.I2C1", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 12, 0, NULL); -+ clk[hfperclkgpio] = clk_register_gate(NULL, "HFPERCLK.GPIO", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 13, 0, NULL); -+ clk[hfperclkvcmp] = clk_register_gate(NULL, "HFPERCLK.VCMP", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 14, 0, NULL); -+ clk[hfperclkprs] = clk_register_gate(NULL, "HFPERCLK.PRS", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 15, 0, NULL); -+ clk[hfperclkadc0] = clk_register_gate(NULL, "HFPERCLK.ADC0", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 16, 0, NULL); -+ clk[hfperclkdac0] = clk_register_gate(NULL, "HFPERCLK.DAC0", "HFXO", -+ 0, base + CMU_HFPERCLKEN0, 17, 0, NULL); -+ -+ of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); -+} -diff --git a/arch/arm/mach-efm32/cmu.h b/arch/arm/mach-efm32/cmu.h -new file mode 100644 -index 0000000..a7e5741 ---- /dev/null -+++ b/arch/arm/mach-efm32/cmu.h -@@ -0,0 +1,15 @@ -+/* -+ * Register definition for efm32's CMU component -+ */ -+ -+#define CMU_OSCENCMD 0x20 -+#define CMU_OSCENCMD_HFXOEN 0x00000004 -+ -+#define CMU_CMD 0x24 -+#define CMU_CMD_HFCLKSEL_HFXO 0x00000002 -+ -+#define CMU_STATUS 0x2c -+#define CMU_STATUS_HFRCOSEL 0x00000400 -+#define CMU_STATUS_HFXOSEL 0x00000800 -+ -+#define CMU_HFPERCLKEN0 0x44 -diff --git a/arch/arm/mach-efm32/common.h b/arch/arm/mach-efm32/common.h -new file mode 100644 -index 0000000..8b04c19 ---- /dev/null -+++ b/arch/arm/mach-efm32/common.h -@@ -0,0 +1,3 @@ -+void efm32_timer_init(void); -+ -+void efm32_clk_init(void); -diff --git a/arch/arm/mach-efm32/dtmachine.c b/arch/arm/mach-efm32/dtmachine.c -new file mode 100644 -index 0000000..30fce6d ---- /dev/null -+++ b/arch/arm/mach-efm32/dtmachine.c -@@ -0,0 +1,28 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+ -+static void __init efm32_init(void) -+{ -+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -+} -+ -+static const char *const efm32gg_compat[] __initconst = { -+ "efm32,dk3750", -+ NULL -+}; -+ -+DT_MACHINE_START(EFM32DT, "EFM32 (Device Tree Support)") -+ .init_irq = irqchip_init, -+ .init_time = efm32_timer_init, -+ .init_machine = efm32_init, -+ .dt_compat = efm32gg_compat, -+MACHINE_END -diff --git a/arch/arm/mach-efm32/include/mach/debug-macro.S b/arch/arm/mach-efm32/include/mach/debug-macro.S -new file mode 100644 -index 0000000..c58915c ---- /dev/null -+++ b/arch/arm/mach-efm32/include/mach/debug-macro.S -@@ -0,0 +1,48 @@ -+/* -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#define UARTn_CMD 0x000c -+#define UARTn_CMD_TXEN 0x0004 -+ -+#define UARTn_STATUS 0x0010 -+#define UARTn_STATUS_TXC 0x0020 -+#define UARTn_STATUS_TXBL 0x0040 -+ -+#define UARTn_TXDATA 0x0034 -+ -+ .macro addruart, rx, tmp -+#if defined(CONFIG_DEBUG_EFM32_USART1) -+ ldr \rx, =(0x4000c400) /* USART1 */ -+#elif defined(CONFIG_DEBUG_EFM32_UART1) -+ ldr \rx, =(0x4000e400) /* UART1 */ -+#else -+#error "No debug port configured" -+#endif -+ /* -+ * enable TX. The driver might disable that to save energy. We -+ * don't care about disabling at the end as during debug power -+ * consumption isn't that important. -+ */ -+ ldr \tmp, =(UARTn_CMD_TXEN) -+ str \tmp, [\rx, #UARTn_CMD] -+ .endm -+ -+ -+ .macro senduart,rd,rx -+ strb \rd, [\rx, #UARTn_TXDATA] -+ .endm -+ -+ .macro waituart,rd,rx -+1001: ldr \rd, [\rx, #UARTn_STATUS] -+ tst \rd, #UARTn_STATUS_TXBL -+ beq 1001b -+ .endm -+ -+ .macro busyuart,rd,rx -+1001: ldr \rd, [\rx, UARTn_STATUS] -+ tst \rd, #UARTn_STATUS_TXC -+ bne 1001b -+ .endm -diff --git a/arch/arm/mach-efm32/include/mach/entry-macro.S b/arch/arm/mach-efm32/include/mach/entry-macro.S -new file mode 100644 -index 0000000..547f7b1 ---- /dev/null -+++ b/arch/arm/mach-efm32/include/mach/entry-macro.S -@@ -0,0 +1,9 @@ -+/* -+ * -+ */ -+ -+ .macro get_irqnr_preamble, base, tmp -+ .endm -+ -+ .macro arch_ret_to_user, tmp1, tmp2 -+ .endm -diff --git a/arch/arm/mach-efm32/include/mach/io.h b/arch/arm/mach-efm32/include/mach/io.h -new file mode 100644 -index 0000000..bc3519b ---- /dev/null -+++ b/arch/arm/mach-efm32/include/mach/io.h -@@ -0,0 +1,6 @@ -+#ifndef __MACH_IO_H__ -+#define __MACH_IO_H__ -+ -+#define __mem_pci(a) (a) -+ -+#endif /* __MACH_IO_H__ */ -diff --git a/arch/arm/mach-efm32/include/mach/irqs.h b/arch/arm/mach-efm32/include/mach/irqs.h -new file mode 100644 -index 0000000..e33ed12 ---- /dev/null -+++ b/arch/arm/mach-efm32/include/mach/irqs.h -@@ -0,0 +1,6 @@ -+#ifndef __MACH_IRQS_H__ -+#define __MACH_IRQS_H__ -+ -+#define NR_IRQS 82 -+ -+#endif /* __MACH_IRQS_H__ */ -diff --git a/arch/arm/mach-efm32/include/mach/system.h b/arch/arm/mach-efm32/include/mach/system.h -new file mode 100644 -index 0000000..619222c ---- /dev/null -+++ b/arch/arm/mach-efm32/include/mach/system.h -@@ -0,0 +1,18 @@ -+#ifndef __MACH_SYSTEM_H__ -+#define __MACH_SYSTEM_H__ -+ -+#include -+ -+static inline void arch_idle(void) -+{ -+ cpu_do_idle(); -+} -+ -+static inline void arch_reset(char mode, const char *cmd) -+{ -+ /* XXX: move this to (say) cpuv7m_reset */ -+ dsb(); -+ __raw_writel(0x05fa0004, (void __iomem *)0xe000ed0c); -+ dsb(); -+} -+#endif /* __MACH_SYSTEM_H__ */ -diff --git a/arch/arm/mach-efm32/include/mach/timex.h b/arch/arm/mach-efm32/include/mach/timex.h -new file mode 100644 -index 0000000..b408dce ---- /dev/null -+++ b/arch/arm/mach-efm32/include/mach/timex.h -@@ -0,0 +1,7 @@ -+#ifndef __MACH_TIMEX_H__ -+#define __MACH_TIMEX_H__ -+ -+/* just a bogus value */ -+#define CLOCK_TICK_RATE 12345678 -+ -+#endif /* __MACH_TIMEX_H__ */ -diff --git a/arch/arm/mach-efm32/time.c b/arch/arm/mach-efm32/time.c -new file mode 100644 -index 0000000..1181bf2 ---- /dev/null -+++ b/arch/arm/mach-efm32/time.c -@@ -0,0 +1,289 @@ -+#define DEBUG -+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+ -+#define BASEADDR_TIMER(n) IOMEM(0x40010000 + (n) * 0x400) -+ -+#define TIMERn_CTRL 0x00 -+#define TIMERn_CTRL_PRESC(val) (((val) & 0xf) << 24) -+#define TIMERn_CTRL_PRESC_1024 TIMERn_CTRL_PRESC(10) -+#define TIMERn_CTRL_CLKSEL(val) (((val) & 0x3) << 16) -+#define TIMERn_CTRL_CLKSEL_PRESCHFPERCLK TIMERn_CTRL_CLKSEL(0) -+#define TIMERn_CTRL_OSMEN 0x00000010 -+#define TIMERn_CTRL_MODE(val) (((val) & 0x3) << 0) -+#define TIMERn_CTRL_MODE_UP TIMERn_CTRL_MODE(0) -+#define TIMERn_CTRL_MODE_DOWN TIMERn_CTRL_MODE(1) -+ -+#define TIMERn_CMD 0x04 -+#define TIMERn_CMD_START 0x1 -+#define TIMERn_CMD_STOP 0x2 -+ -+#define TIMERn_IEN 0x0c -+#define TIMERn_IF 0x10 -+#define TIMERn_IFS 0x14 -+#define TIMERn_IFC 0x18 -+#define TIMERn_IRQ_UF 0x2 -+#define TIMERn_IRQ_OF 0x1 -+ -+#define TIMERn_TOP 0x1c -+#define TIMERn_CNT 0x24 -+ -+#define TIMER_CLOCKSOURCE 0 -+#define TIMER_CLOCKEVENT 1 -+ -+struct efm32_clock_event_ddata { -+ struct clock_event_device evtdev; -+ void __iomem *base; -+}; -+ -+static void efm32_clock_event_set_mode(enum clock_event_mode mode, -+ struct clock_event_device *evtdev) -+{ -+ struct efm32_clock_event_ddata *ddata = -+ container_of(evtdev, struct efm32_clock_event_ddata, evtdev); -+ -+ switch (mode) { -+ case CLOCK_EVT_MODE_PERIODIC: -+ writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); -+ writel_relaxed(137 /* XXX: magic constant */, ddata->base + TIMERn_TOP); -+ writel_relaxed(TIMERn_CTRL_PRESC_1024 | -+ TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | -+ TIMERn_CTRL_MODE_DOWN, -+ ddata->base + TIMERn_CTRL); -+ writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD); -+ break; -+ -+ case CLOCK_EVT_MODE_ONESHOT: -+ writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); -+ writel_relaxed(TIMERn_CTRL_PRESC_1024 | -+ TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | -+ TIMERn_CTRL_OSMEN | -+ TIMERn_CTRL_MODE_DOWN, -+ ddata->base + TIMERn_CTRL); -+ break; -+ -+ case CLOCK_EVT_MODE_UNUSED: -+ case CLOCK_EVT_MODE_SHUTDOWN: -+ writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); -+ break; -+ -+ case CLOCK_EVT_MODE_RESUME: -+ break; -+ } -+} -+ -+static int efm32_clock_event_set_next_event(unsigned long evt, -+ struct clock_event_device *evtdev) -+{ -+ struct efm32_clock_event_ddata *ddata = -+ container_of(evtdev, struct efm32_clock_event_ddata, evtdev); -+ -+ writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); -+ writel_relaxed(evt, ddata->base + TIMERn_CNT); -+ writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD); -+ -+ return 0; -+} -+ -+static irqreturn_t efm32_clock_event_handler(int irq, void *dev_id) -+{ -+ struct efm32_clock_event_ddata *ddata = dev_id; -+ -+ writel_relaxed(TIMERn_IRQ_UF, ddata->base + TIMERn_IFC); -+ -+ ddata->evtdev.event_handler(&ddata->evtdev); -+ -+ return IRQ_HANDLED; -+} -+ -+static struct efm32_clock_event_ddata clock_event_ddata = { -+ .evtdev = { -+ .name = "efm32 clockevent", -+ .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_MODE_PERIODIC, -+ .set_mode = efm32_clock_event_set_mode, -+ .set_next_event = efm32_clock_event_set_next_event, -+ .rating = 200, -+ }, -+}; -+ -+static struct irqaction efm32_clock_event_irq = { -+ .name = "efm32 clockevent", -+ .flags = IRQF_TIMER, -+ .handler = efm32_clock_event_handler, -+ .dev_id = &clock_event_ddata, -+}; -+ -+/* -+ * XXX: use clk_ API to get frequency and enabling of the clocks used. -+ * Here the reset defaults are used: -+ * - freq_{HFPERCLK} = freq_{HFCLK} -+ * (CMU_HFPERCLKDIV_HFPERCLKDIV = 0x0) -+ * - freq_{HFCLK} = freq_{HFRCO} -+ * (CMU_CTRL_HFCLKDIV = 0x0, CMU_STATUS_HFRCOSEL = 0x1) -+ * - freq_{HFRCO} = 14MHz -+ * (CMU_HFRCOCTRL_BAND = 0x3) -+ * -+ * So the HFPERCLK runs at 14MHz. The timer has an additional prescaler -+ * programmed to /1024. This make the timer run at -+ * -+ * 14 MHz / 1024 = 13671.875 Hz -+ * -+ * When HFXO is used HFPERCLK runs at 48 MHz, so the timer runs at -+ * -+ * 48 MHz / 1024 = 46875 Hz -+ * -+ */ -+ -+static int efm32_timer_clocksource_init(struct device_node *np) -+{ -+ struct clk *clk; -+ void __iomem *base; -+ unsigned long rate; -+ int ret; -+ -+ clk = of_clk_get(np, 0); -+ if (IS_ERR(clk)) { -+ pr_err("failed to get clock for clocksource\n"); -+ ret = PTR_ERR(clk); -+ goto err_clk_get; -+ } -+ -+ ret = clk_prepare_enable(clk); -+ if (ret) { -+ pr_err("failed to enable timer clock for clocksource\n"); -+ goto err_clk_enable; -+ } -+ rate = clk_get_rate(clk); -+ -+ base = of_iomap(np, 0); -+ if (!base) { -+ pr_err("failed to map registers for clocksource\n"); -+ goto err_iomap; -+ } -+ -+ writel_relaxed(TIMERn_CTRL_PRESC_1024 | -+ TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | -+ TIMERn_CTRL_MODE_UP, base + TIMERn_CTRL); -+ writel_relaxed(TIMERn_CMD_START, base + TIMERn_CMD); -+ -+ return clocksource_mmio_init(base + TIMERn_CNT, -+ "efm32 timer", rate / 1024, 200, 16, -+ clocksource_mmio_readl_up); -+ -+ iounmap(base); -+err_iomap: -+ -+ clk_disable_unprepare(clk); -+err_clk_enable: -+ -+ clk_put(clk); -+err_clk_get: -+ -+ return ret; -+} -+ -+int __init efm32_clockevent_init(struct device_node *np) -+{ -+ struct clk *clk; -+ void __iomem *base; -+ unsigned long rate; -+ int irq; -+ int ret; -+ -+ clk = of_clk_get(np, 0); -+ if (IS_ERR(clk)) { -+ pr_err("failed to get clock for clocksource\n"); -+ ret = PTR_ERR(clk); -+ goto err_clk_get; -+ } -+ -+ ret = clk_prepare_enable(clk); -+ if (ret) { -+ pr_err("failed to enable timer clock for clocksource\n"); -+ goto err_clk_enable; -+ } -+ rate = clk_get_rate(clk); -+ -+ base = of_iomap(np, 0); -+ if (!base) { -+ pr_err("failed to map registers for clocksource\n"); -+ goto err_iomap; -+ } -+ -+ irq = irq_of_parse_and_map(np, 0); -+ if (!irq) { -+ pr_err("failed to get irq\n"); -+ goto err_get_irq; -+ } -+ -+ writel_relaxed(TIMERn_IRQ_UF, base + TIMERn_IEN); -+ -+ clock_event_ddata.base = base; -+ -+ setup_irq(irq, &efm32_clock_event_irq); -+ -+ /* XXX: tune min_delta */ -+ clockevents_config_and_register(&clock_event_ddata.evtdev, -+ rate / 1024, 0xf, 0xffff); -+ -+ return 0; -+ -+err_get_irq: -+ -+ iounmap(base); -+err_iomap: -+ -+ clk_disable_unprepare(clk); -+err_clk_enable: -+ -+ clk_put(clk); -+err_clk_get: -+ -+ return ret; -+} -+ -+void __init efm32_timer_init(void) -+{ -+ struct device_node *np; -+ -+ efm32_clk_init(); -+ -+ /* -+ * enable CMU_HFPERCLKEN0_TIMERn for clocksource via bit-band; -+ * XXX: drop this when clock framework is not a stub anymore. -+ */ -+ __raw_writel(1, IOMEM(0x43900894 + 4 * TIMER_CLOCKSOURCE)); -+ /* enable CMU_HFPERCLKEN0_TIMERn for clockevent via bit-band */ -+ __raw_writel(1, IOMEM(0x43900894 + 4 * TIMER_CLOCKEVENT)); -+ -+ np = of_find_compatible_node(NULL, NULL, "efm32,timer"); -+ if (!np) { -+ pr_err("failed to find timer node for clocksource\n"); -+ return; -+ } -+ -+ efm32_timer_clocksource_init(np); -+ -+ np = of_find_compatible_node(np, NULL, "efm32,timer"); -+ if (!np) { -+ pr_err("failed to find timer node for clock events\n"); -+ return; -+ } -+ -+ efm32_clockevent_init(np); -+ -+ of_node_put(np); -+} diff --git a/patches/linux-3.11-rc1/0005-ARM-efm32-some-more-stuff.patch b/patches/linux-3.11-rc1/0005-ARM-efm32-some-more-stuff.patch deleted file mode 100644 index 90ddbf3..0000000 --- a/patches/linux-3.11-rc1/0005-ARM-efm32-some-more-stuff.patch +++ /dev/null @@ -1,297 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Tue, 12 Mar 2013 14:44:10 +0100 -Subject: [PATCH] ARM: efm32: some more stuff -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Uwe Kleine-König ---- - arch/arm/Kconfig-nommu | 4 + - arch/arm/mach-efm32/Makefile | 2 +- - arch/arm/mach-efm32/common.c | 207 ++++++++++++++++++++++++++++++++++++++++ - arch/arm/mach-efm32/common.h | 7 ++ - arch/arm/mach-efm32/dtmachine.c | 7 ++ - 5 files changed, 226 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/mach-efm32/common.c - -diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu -index aed66d5..6128083 100644 ---- a/arch/arm/Kconfig-nommu -+++ b/arch/arm/Kconfig-nommu -@@ -11,18 +11,22 @@ config SET_MEM_PARAM - - config DRAM_BASE - hex '(S)DRAM Base Address' if SET_MEM_PARAM -+ default 0x88000000 if MACH_EFM32GG_DK3750 - default 0x00800000 - - config DRAM_SIZE - hex '(S)DRAM SIZE' if SET_MEM_PARAM -+ default 0x00400000 if MACH_EFM32GG_DK3750 - default 0x00800000 - - config FLASH_MEM_BASE - hex 'FLASH Base Address' if SET_MEM_PARAM -+ default 0x00000000 if MACH_EFM32GG_DK3750 - default 0x00400000 - - config FLASH_SIZE - hex 'FLASH Size' if SET_MEM_PARAM -+ default 0x00100000 if MACH_EFM32GG_DK3750 - default 0x00400000 - - config PROCESSOR_ID -diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile -index c6786a0..d70b093 100644 ---- a/arch/arm/mach-efm32/Makefile -+++ b/arch/arm/mach-efm32/Makefile -@@ -1 +1 @@ --obj-y += clk.o dtmachine.o time.o -+obj-y += clk.o common.o dtmachine.o time.o -diff --git a/arch/arm/mach-efm32/common.c b/arch/arm/mach-efm32/common.c -new file mode 100644 -index 0000000..cb073ba ---- /dev/null -+++ b/arch/arm/mach-efm32/common.c -@@ -0,0 +1,207 @@ -+/* -+ * Copyright (C) 2012 Uwe Kleine-Koenig for Pengutronix -+ * -+ * This program is free software; you can redistribute it and/or modify it under -+ * the terms of the GNU General Public License version 2 as published by the -+ * Free Software Foundation. -+ */ -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+ -+/* move this somewhere else */ -+void cm3_restart(char mode, const char *cmd) -+{ -+ dsb(); -+ __raw_writel(0x05fa0004, (void __iomem *)0xe000ed0c); -+ dsb(); -+} -+ -+#define MEM_INFO_FLASH (void __iomem *)0x0fe081f8 -+#define MEM_INFO_RAM (void __iomem *)0x0fe081fa -+#define PART_NUMBER (void __iomem *)0x0fe081fc -+#define PART_FAMILY (void __iomem *)0x0fe081fe -+#define PROD_REV (void __iomem *)0x0fe081ff -+ -+static const struct efm32_family_mapping { -+ u8 id; -+ const char *name; -+ const char *abbrev; -+} efm32_family_mapping[] __initconst = { -+ { -+ .id = 71, -+ .name = "Gecko", -+ .abbrev = "G", -+ }, { -+ .id = 72, -+ .name = "Giant Gecko", -+ .abbrev = "GG", -+ }, { -+ .id = 73, -+ .name = "Tiny Gecko", -+ .abbrev = "TG", -+ }, { -+ .id = 74, -+ .name = "Leopard Gecko", -+ .abbrev = "LG", -+ }, { -+ .id = 75, -+ .name = "Zero Gecko", -+ .abbrev = "ZG", -+ }, -+}; -+ -+static const char *__init efm32_get_familyname(u8 id) -+{ -+ size_t i; -+ -+ for (i = 0; i < ARRAY_SIZE(efm32_family_mapping) && -+ efm32_family_mapping[i].id <= id; ++i) { -+ if (efm32_family_mapping[i].id == id) -+ return efm32_family_mapping[i].name; -+ } -+ -+ return "unknown"; -+} -+ -+static const char *__init efm32_get_familyabbrev(u8 id) -+{ -+ size_t i; -+ -+ for (i = 0; i < ARRAY_SIZE(efm32_family_mapping) && -+ efm32_family_mapping[i].id <= id; ++i) { -+ if (efm32_family_mapping[i].id == id) -+ return efm32_family_mapping[i].abbrev; -+ } -+ -+ return "unknown"; -+} -+ -+static char revbuf[4] __initdata = ""; -+static volatile const u32 * const romtable = (void *)0xe00fffe0; -+ -+static const char *__init efm32_get_rev(void) -+{ -+ if (revbuf[0] == '\0') { -+ u32 major = romtable[0] & 0x3f; -+ u32 minor = (romtable[2] & 0xf0) | ((romtable[3] >> 4) & 0x0f); -+ -+ if (minor < 25) -+ sprintf(revbuf, "%u%c", major, 'A' + minor); -+ else { -+ revbuf[0] = '?'; -+ revbuf[1] = '\0'; -+ } -+ } -+ return revbuf; -+} -+ -+void __init efm32_print_cpuinfo(void) -+{ -+ u16 partno = __raw_readw(PART_NUMBER); -+ u8 family = __raw_readb(PART_FAMILY); -+ u8 rev = __raw_readb(PROD_REV); -+ u16 flashsize = __raw_readw(MEM_INFO_FLASH); -+ u16 raminfo = __raw_readw(MEM_INFO_RAM); -+ -+ pr_info("Energy Micro %s, EFM32%s%hdF%hd (rev %s, prodrev %hhd), %hd kB RAM\n", -+ efm32_get_familyname(family), -+ efm32_get_familyabbrev(family), partno, -+ flashsize, efm32_get_rev(), rev, raminfo); -+} -+ -+static const struct { -+ u32 value; -+ u32 mask; -+ const char *cause; -+} efm32_reset_causes[] = { -+ { -+ .value = 0x0001, -+ .mask = 0x0001, -+ .cause = "A Power-on Reset has been performed", -+ }, { -+ .value = 0x0002, -+ .mask = 0x0083, -+ .cause = "A Brown-out has been detected on the unregulated power", -+ }, { -+ .value = 0x0004, -+ .mask = 0x001f, -+ .cause = "A Brown-out has been detected on the regulated power", -+ }, { -+ .value = 0x0008, -+ .mask = 0x000b, -+ .cause = "An external reset has been applied", -+ }, { -+ .value = 0x0010, -+ .mask = 0x0013, -+ .cause = "A watchdog reset has occurred", -+ }, { -+ .value = 0x0020, -+ .mask = 0x07ff, -+ .cause = "A lockup reset has occurred", -+ }, { -+ .value = 0x0080, -+ .mask = 0x07df, -+ .cause = "A system request reset has occurred", -+ }, { -+ .value = 0x0080, -+ .mask = 0x0799, -+ .cause = "The system as woken up from EM4", -+ }, { -+ .value = 0x0180, -+ .mask = 0x799, -+ .cause = "The system as woken up from EM4 on an EM4 wakeup reset request from pin", -+ }, { -+ .value = 0x0200, -+ .mask = 0x079f, -+ .cause = "A Brown-out has been detected on Analog Power Domain 0 (AVDD0)", -+ }, { -+ .value = 0x0400, -+ .mask = 0x079f, -+ .cause = "A Brown-out has been detected on Analog Power Domain 1 (AVDD1)", -+ }, { -+ .value = 0x0800, -+ .mask = 0x0800, -+ .cause = "A Brown-out has been detected by the Backup BOD on VDD_DREG", -+ }, { -+ .value = 0x1000, -+ .mask = 0x1000, -+ .cause = "A Brown-out has been detected by the Backup BOD on BU_VIN", -+ }, { -+ .value = 0x2000, -+ .mask = 0x2000, -+ .cause = "A Brown-out has been detected by the Backup BOD on unregulated power", -+ }, { -+ .value= 0x4000, -+ .mask = 0x4000, -+ .cause = "A Brown-out has been detected by the Backup BOD on regulated power", -+ }, { -+ .value = 0x8000, -+ .mask = 0x8000, -+ .cause = "The system has been in Backup mode", -+ }, -+}; -+ -+void __init efm32_print_reset_cause(void) -+{ -+ u32 rmu_rstcause = __raw_readl((void __iomem *)0x400ca004); -+ int i; -+ -+ pr_info("Reset Cause: 0x%08x\n", rmu_rstcause); -+ -+ for (i = 0; i < ARRAY_SIZE(efm32_reset_causes); ++i) { -+ if ((rmu_rstcause & efm32_reset_causes[i].mask) == -+ efm32_reset_causes[i].value) -+ pr_info(" `-> %s.\n", efm32_reset_causes[i].cause); -+ } -+ -+ /* clear RMU_RSTCAUSE */ -+ __raw_writel(1, (void __iomem *)0x400ca008); -+ __raw_writel(1, (void __iomem *)0x400c6024); -+ __raw_writel(0, (void __iomem *)0x400c6024); -+} -diff --git a/arch/arm/mach-efm32/common.h b/arch/arm/mach-efm32/common.h -index 8b04c19..96109b6 100644 ---- a/arch/arm/mach-efm32/common.h -+++ b/arch/arm/mach-efm32/common.h -@@ -1,3 +1,10 @@ - void efm32_timer_init(void); - - void efm32_clk_init(void); -+ -+/* XXX: find a better place for that */ -+void cm3_restart(char mode, const char *cmd); -+ -+void efm32_print_cpuinfo(void); -+ -+void efm32_print_reset_cause(void); -diff --git a/arch/arm/mach-efm32/dtmachine.c b/arch/arm/mach-efm32/dtmachine.c -index 30fce6d..edad4c4 100644 ---- a/arch/arm/mach-efm32/dtmachine.c -+++ b/arch/arm/mach-efm32/dtmachine.c -@@ -13,6 +13,13 @@ - static void __init efm32_init(void) - { - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -+ -+ /* -+ * Pinmuxing isn't specified in the device tree. Probably it's too heavy -+ * considering that there is only 4 MiB of RAM -+ */ -+ //efm32gg990_add_efm32_pinctrl(); -+ //pinmux_register_mappings(efm32_pinmux, ARRAY_SIZE(efm32_pinmux)); - } - - static const char *const efm32gg_compat[] __initconst = { diff --git a/patches/linux-3.11-rc1/0006-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch b/patches/linux-3.11-rc1/0006-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch deleted file mode 100644 index 8cdb4c9..0000000 --- a/patches/linux-3.11-rc1/0006-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch +++ /dev/null @@ -1,424 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Tue, 12 Feb 2013 23:31:27 +0100 -Subject: [PATCH] gpio: new driver for Energy Micro's GPIO component - ---- - arch/arm/Kconfig | 1 + - drivers/gpio/Kconfig | 4 + - drivers/gpio/Makefile | 1 + - drivers/gpio/gpio-efm32.c | 367 ++++++++++++++++++++++++++++++++++++++++++++++ - 4 files changed, 373 insertions(+) - create mode 100644 drivers/gpio/gpio-efm32.c - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index b8196cc..d788fd6 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -407,6 +407,7 @@ config ARCH_EBSA110 - config ARCH_EFM32 - bool "Energy Micro Cortex M3 Platform" - depends on !MMU -+ select ARCH_REQUIRE_GPIOLIB - select ARM_NVIC - select CLKSRC_MMIO - select COMMON_CLK -diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig -index b2450ba..1a496b3 100644 ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -127,6 +127,10 @@ config GPIO_IT8761E - help - Say yes here to support GPIO functionality of IT8761E super I/O chip. - -+config GPIO_EFM32 -+ tristate "Energy Micro EFM32 GPIO support" -+ depends on ARCH_EFM32 -+ - config GPIO_EM - tristate "Emma Mobile GPIO" - depends on ARM -diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile -index ef3e983..311f512 100644 ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -22,6 +22,7 @@ obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o - obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o - obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o - obj-$(CONFIG_ARCH_DAVINCI) += gpio-davinci.o -+obj-$(CONFIG_GPIO_EFM32) += gpio-efm32.o - obj-$(CONFIG_GPIO_EM) += gpio-em.o - obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o - obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o -diff --git a/drivers/gpio/gpio-efm32.c b/drivers/gpio/gpio-efm32.c -new file mode 100644 -index 0000000..3bed872 ---- /dev/null -+++ b/drivers/gpio/gpio-efm32.c -@@ -0,0 +1,367 @@ -+/* -+ * Copyright (C) 2013 Pengutronix -+ * Uwe Kleine-Koenig -+ * -+ * This program is free software; you can redistribute it and/or modify it under -+ * the terms of the GNU General Public License version 2 as published by the -+ * Free Software Foundation. -+ * -+ * TODO: -+ * - disable clk in suspend iff no irq is enabled to wake the system -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define DRIVER_NAME "efm32-gpio" -+ -+#define GPIO_Px_MODEL(p) (0x024 * (p) + 0x004) -+#define GPIO_Px_MODEH(p) (0x024 * (p) + 0x008) -+#define GPIO_Px_DOUT(p) (0x024 * (p) + 0x00c) -+#define GPIO_Px_DOUTSET(p) (0x024 * (p) + 0x010) -+#define GPIO_Px_DOUTCLR(p) (0x024 * (p) + 0x014) -+#define GPIO_Px_DIN(p) (0x024 * (p) + 0x01c) -+#define GPIO_EXTIPSELL 0x100 -+#define GPIO_EXTIPSELH 0x104 -+#define GPIO_IEN 0x110 -+#define GPIO_IF 0x114 -+#define GPIO_IFC 0x11c -+ -+struct efm32_gpio_ddata { -+ void __iomem *base; -+ spinlock_t lock; -+ struct clk *clk; -+ unsigned int irq_even, irq_odd; -+ struct irq_domain *irq_domain; -+ struct gpio_chip chip; -+ unsigned assigned_irqpins; -+}; -+ -+#define to_ddata(chip) container_of(chip, struct efm32_gpio_ddata, chip) -+ -+static unsigned efm32_gpio_get_mode(struct efm32_gpio_ddata *ddata, -+ unsigned pin, unsigned port) -+{ -+ return (readl(ddata->base + (pin < 8 ? GPIO_Px_MODEL(port) : GPIO_Px_MODEH(port))) >> (4 * (pin & 7))) & 0xf; -+ -+} -+static int efm32_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -+{ -+ struct efm32_gpio_ddata *ddata = to_ddata(chip); -+ unsigned pin = offset % 16; -+ unsigned port = offset / 16; -+ unsigned mode; -+ int ret; -+ -+ mode = efm32_gpio_get_mode(ddata, pin, port); -+ -+ /* -+ * XXX: don't reconfigure, needs to be resolved in combination with a -+ * pinmux driver -+ */ -+ if (mode > 0 && mode < 4) -+ ret = 0; -+ else -+ ret = -EIO; -+ -+ return ret; -+} -+ -+static int efm32_gpio_get(struct gpio_chip *chip, unsigned offset) -+{ -+ struct efm32_gpio_ddata *ddata = to_ddata(chip); -+ unsigned pin = offset % 16; -+ unsigned port = offset / 16; -+ -+ /* XXX use bitband to simplify? */ -+ return readl(ddata->base + GPIO_Px_DIN(port)) & (1 << pin); -+} -+ -+static int efm32_gpio_direction_output(struct gpio_chip *chip, -+ unsigned offset, int value) -+{ -+ struct efm32_gpio_ddata *ddata = to_ddata(chip); -+ unsigned pin = offset % 16; -+ unsigned port = offset / 16; -+ unsigned mode; -+ int ret; -+ -+ mode = efm32_gpio_get_mode(ddata, pin, port); -+ /* -+ * XXX: don't reconfigure, needs to be resolved in combination with a -+ * pinmux driver -+ */ -+ if (mode >= 4) -+ ret = 0; -+ else -+ ret = -EIO; -+ -+ return ret; -+} -+ -+static void efm32_gpio_set(struct gpio_chip *chip, -+ unsigned offset, int value) -+{ -+ struct efm32_gpio_ddata *ddata = to_ddata(chip); -+ unsigned pin = offset % 16; -+ unsigned port = offset / 16; -+ -+ writel(1 << pin, ddata->base + -+ (value ? GPIO_Px_DOUTSET(port) : GPIO_Px_DOUTCLR(port))); -+} -+ -+static int efm32_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -+{ -+ struct efm32_gpio_ddata *ddata = to_ddata(chip); -+ unsigned pin = offset % 16; -+ unsigned port = offset / 16; -+ unsigned extipsel_offset = pin < 8 ? GPIO_EXTIPSELL : GPIO_EXTIPSELH; -+ unsigned extipsel; -+ unsigned extipsel_shift = (pin % 8) * 4; -+ -+ spin_lock(&ddata->lock); -+ -+ extipsel = readl(ddata->base + extipsel_offset); -+ -+ if (ddata->assigned_irqpins & (1 << pin)) { -+ if (((extipsel >> extipsel_shift) & 0x7) != port) { -+ spin_unlock(&ddata->lock); -+ clk_disable(ddata->clk); -+ return -EBUSY; -+ } -+ } -+ -+ extipsel &= ~(0x7 << extipsel_shift); -+ extipsel |= port << extipsel_shift; -+ ddata->assigned_irqpins |= 1 << pin; -+ writel(extipsel, ddata->base + extipsel_offset); -+ -+ spin_unlock(&ddata->lock); -+ -+ return irq_create_mapping(ddata->irq_domain, offset % 16); -+} -+ -+static irqreturn_t efm32_gpio_handler(struct efm32_gpio_ddata *ddata, unsigned mask) -+{ -+ unsigned flag, init_flag; -+ irqreturn_t iret = IRQ_NONE; -+ -+ init_flag = flag = readl(ddata->base + GPIO_IF) & mask; -+ -+ while (flag) { -+ int line = __fls(flag); -+ -+ writel(1 << line, ddata->base + GPIO_IFC); -+ if (generic_handle_irq(irq_create_mapping(ddata->irq_domain, line))) -+ iret = IRQ_HANDLED; -+ -+ flag &= ~(1 << line); -+ } -+ return iret; -+} -+ -+static irqreturn_t efm32_gpio_handler_even(int irq, void *data) -+{ -+ struct efm32_gpio_ddata *ddata = data; -+ return efm32_gpio_handler(ddata, 0x55555555U); -+} -+ -+static irqreturn_t efm32_gpio_handler_odd(int irq, void *data) -+{ -+ struct efm32_gpio_ddata *ddata = data; -+ return efm32_gpio_handler(ddata, 0xaaaaaaaaU); -+} -+ -+static void efm32_gpio_irq_ack(struct irq_data *data) -+{ -+ struct efm32_gpio_ddata *ddata = irq_get_chip_data(data->irq); -+ -+ writel(1 << data->hwirq, ddata->base + GPIO_IFC); -+} -+ -+static void efm32_gpio_irq_mask(struct irq_data *data) -+{ -+ struct efm32_gpio_ddata *ddata = irq_get_chip_data(data->irq); -+ unsigned ien; -+ -+ spin_lock(&ddata->lock); -+ ien = readl(ddata->base + GPIO_IEN); -+ ien &= ~(1 << data->hwirq); -+ writel(ien, ddata->base + GPIO_IEN); -+ spin_unlock(&ddata->lock); -+} -+ -+static void efm32_gpio_irq_unmask(struct irq_data *data) -+{ -+ struct efm32_gpio_ddata *ddata = irq_get_chip_data(data->irq); -+ unsigned ien; -+ -+ spin_lock(&ddata->lock); -+ ien = readl(ddata->base + GPIO_IEN); -+ ien |= 1 << data->hwirq; -+ writel(ien, ddata->base + GPIO_IEN); -+ spin_unlock(&ddata->lock); -+} -+ -+static struct irq_chip efm32_gpio_irqchip = { -+ .irq_ack = efm32_gpio_irq_ack, -+ .irq_mask = efm32_gpio_irq_mask, -+ .irq_unmask = efm32_gpio_irq_unmask, -+}; -+ -+static int efm32_gpio_irq_map(struct irq_domain *d, unsigned int virq, -+ irq_hw_number_t hw) -+{ -+ struct efm32_gpio_ddata *ddata = d->host_data; -+ -+ irq_set_chip_data(virq, ddata); -+ irq_set_chip_and_handler(virq, &efm32_gpio_irqchip, handle_edge_irq); -+ -+ set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops efm32_gpio_irq_domain_ops = { -+ .map = efm32_gpio_irq_map, -+}; -+ -+static int efm32_gpio_probe(struct platform_device *pdev) -+{ -+ struct efm32_gpio_ddata *ddata; -+ struct resource *res; -+ int ret = -ENOMEM; -+ int irq_even, irq_odd; -+ -+ ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); -+ if (!ddata) { -+ dev_err(&pdev->dev, "cannot allocate driver data"); -+ return -ENOMEM; -+ } -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) { -+ dev_err(&pdev->dev, "can't get device resources\n"); -+ return -ENOENT; -+ } -+ -+ ddata->clk = devm_clk_get(&pdev->dev, NULL); -+ if (IS_ERR(ddata->clk)) { -+ ret = PTR_ERR(ddata->clk); -+ dev_err(&pdev->dev, "can't get clock (%d)\n", ret); -+ return ret; -+ } -+ -+ irq_even = platform_get_irq(pdev, 0); -+ irq_odd = platform_get_irq(pdev, 1); -+ if (irq_even <= 0 || irq_odd <= 0) { -+ dev_err(&pdev->dev, "can't get irq numbers (%d, %d)\n", -+ irq_even, irq_odd); -+ return -ENOENT; -+ } -+ ddata->irq_even = irq_even; -+ ddata->irq_odd = irq_odd; -+ -+ ddata->base = devm_request_and_ioremap(&pdev->dev, res); -+ if (!ddata->base) { -+ dev_err(&pdev->dev, -+ "cannot request and ioremap register set\n"); -+ return -EADDRNOTAVAIL; -+ } -+ -+ spin_lock_init(&ddata->lock); -+ -+ ret = clk_prepare_enable(ddata->clk); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "cannot enable clock (%d)\n", ret); -+ return ret; -+ } -+ -+ /* disable and clear irqs */ -+ writel(0, ddata->base + GPIO_IEN); -+ writel(0xffff, ddata->base + GPIO_IFC); -+ -+ ddata->irq_domain = irq_domain_add_linear(pdev->dev.of_node, -+ 16, &efm32_gpio_irq_domain_ops, ddata); -+ if (!ddata->irq_domain) { -+ dev_err(&pdev->dev, "failed to add irq_domain\n"); -+ goto err_add_irq_domain; -+ } -+ -+ ddata->chip.label = DRIVER_NAME; -+ ddata->chip.dev = &pdev->dev; -+ ddata->chip.owner = THIS_MODULE; -+ -+ //ddata->chip.get_direction -+ ddata->chip.direction_input = efm32_gpio_direction_input; -+ ddata->chip.get = efm32_gpio_get; -+ ddata->chip.direction_output = efm32_gpio_direction_output; -+ ddata->chip.set = efm32_gpio_set; -+ ddata->chip.to_irq = efm32_gpio_to_irq; -+ ddata->chip.base = -1; -+ ddata->chip.ngpio = 96; -+ ddata->chip.can_sleep = 0; -+ -+ ret = request_irq(ddata->irq_even, efm32_gpio_handler_even, -+ 0, DRIVER_NAME, ddata); -+ if (ret) -+ goto err_request_even_irq; -+ -+ ret = request_irq(ddata->irq_odd, efm32_gpio_handler_odd, -+ 0, DRIVER_NAME, ddata); -+ if (ret) -+ goto err_request_odd_irq; -+ -+ ret = gpiochip_add(&ddata->chip); -+ if (ret) { -+ free_irq(ddata->irq_odd, ddata); -+err_request_odd_irq: -+ -+ free_irq(ddata->irq_even, ddata); -+err_request_even_irq: -+ -+ irq_domain_remove(ddata->irq_domain); -+ } -+ -+err_add_irq_domain: -+ pr_info("%s: ret=%d\n", __func__, ret); -+ return ret; -+} -+ -+static const struct of_device_id efm32_gpio_dt_ids[] = { -+ { -+ .compatible = "efm32,gpio", -+ }, { -+ /* sentinel */ -+ } -+}; -+MODULE_DEVICE_TABLE(of, efm32_gpio_dt_ids); -+ -+static struct platform_driver efm32_gpio_driver = { -+ .probe = efm32_gpio_probe, -+ -+ .driver = { -+ .name = DRIVER_NAME, -+ .owner = THIS_MODULE, -+ .of_match_table = efm32_gpio_dt_ids, -+ }, -+}; -+ -+static int __init efm32_gpio_init(void) -+{ -+ return platform_driver_register(&efm32_gpio_driver); -+} -+postcore_initcall(efm32_gpio_init); -+ -+MODULE_LICENSE("GPL v2"); diff --git a/patches/linux-3.11-rc1/0007-efm-board-controller-driver.patch b/patches/linux-3.11-rc1/0007-efm-board-controller-driver.patch deleted file mode 100644 index b7a6834..0000000 --- a/patches/linux-3.11-rc1/0007-efm-board-controller-driver.patch +++ /dev/null @@ -1,234 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Thu, 7 Feb 2013 09:45:30 +0100 -Subject: [PATCH] efm board controller driver - ---- - drivers/mfd/Kconfig | 5 ++ - drivers/mfd/Makefile | 1 + - drivers/mfd/efm32board.c | 192 +++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 198 insertions(+) - create mode 100644 drivers/mfd/efm32board.c - -diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig -index aecd6dd..cf93bd6 100644 ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -1145,6 +1145,11 @@ config MFD_WM8994 - core support for the WM8994, in order to use the actual - functionaltiy of the device other drivers must be enabled. - -+config MFD_EFM32BOARD -+ tristate "efm32 board" -+ depends on ARM -+ select MFD_CORE -+ - endmenu - endif - -diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile -index 3c90051..9a53e91 100644 ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -159,3 +159,4 @@ obj-$(CONFIG_MFD_LM3533) += lm3533-core.o lm3533-ctrlbank.o - obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o vexpress-sysreg.o - obj-$(CONFIG_MFD_RETU) += retu-mfd.o - obj-$(CONFIG_MFD_AS3711) += as3711.o -+obj-$(CONFIG_MFD_EFM32BOARD) += efm32board.o -diff --git a/drivers/mfd/efm32board.c b/drivers/mfd/efm32board.c -new file mode 100644 -index 0000000..ae35916 ---- /dev/null -+++ b/drivers/mfd/efm32board.c -@@ -0,0 +1,192 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DRIVER_NAME "efm32board" -+ -+#define MAGIC 0x04 -+#define INTFLAG 0x40 -+#define INTEN 0x42 -+ -+struct efm32board_ddata { -+ void __iomem *base; -+ unsigned int irq; -+ struct irq_chip chip; -+ struct irq_domain *domain; -+}; -+ -+static void efm32board_irq_ack(struct irq_data *data) -+{ -+ struct efm32board_ddata *ddata = irq_get_chip_data(data->irq); -+ unsigned short val; -+ -+ /* XXX: locking */ -+ val = readw(ddata->base + INTFLAG); -+ val &= ~(1 << data->hwirq); -+ writew(val, ddata->base + INTFLAG); -+} -+ -+static void efm32board_irq_mask(struct irq_data *data) -+{ -+ struct efm32board_ddata *ddata = irq_get_chip_data(data->irq); -+ unsigned short val; -+ -+ if (data->hwirq != 2) { -+ /* XXX: locking */ -+ val = readw(ddata->base + INTEN); -+ val &= ~(1 << data->hwirq); -+ writew(val, ddata->base + INTEN); -+ } -+} -+ -+static void efm32board_irq_unmask(struct irq_data *data) -+{ -+ struct efm32board_ddata *ddata = irq_get_chip_data(data->irq); -+ unsigned short val; -+ -+ /* XXX: locking */ -+ val = readw(ddata->base + INTEN); -+ val |= 1 << data->hwirq; -+ writew(val, ddata->base + INTEN); -+} -+ -+static irqreturn_t efm32board_handler(int irq, void *data) -+{ -+ unsigned short val; -+ struct efm32board_ddata *ddata = data; -+ irqreturn_t ret = IRQ_NONE; -+ -+ val = readw(ddata->base + INTFLAG); -+ /* ack BC irq */ -+ writew(0, ddata->base + INTFLAG); -+ -+ while (val) { -+ int line = __fls(val); -+ -+ if (!generic_handle_irq(irq_create_mapping(ddata->domain, line))) -+ ret = IRQ_HANDLED; -+ val &= ~(1 << line); -+ } -+ return ret; -+} -+ -+int efm32board_irqdomain_map(struct irq_domain *d, unsigned int virq, -+ irq_hw_number_t hw) -+{ -+ struct efm32board_ddata *ddata = d->host_data; -+ -+ irq_set_chip_data(virq, ddata); -+ irq_set_chip_and_handler(virq, &ddata->chip, handle_edge_irq); -+ -+ set_irq_flags(virq, IRQF_VALID); -+ -+ return 0; -+} -+ -+const struct irq_domain_ops efm32board_irqdomain_ops = { -+ .map = efm32board_irqdomain_map, -+ .xlate = irq_domain_xlate_onecell, -+}; -+ -+static int efm32board_probe(struct platform_device *pdev) -+{ -+ struct resource *res; -+ int irq, gpio, ret; -+ struct efm32board_ddata *ddata; -+ unsigned short val; -+ -+ ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); -+ if (!ddata) { -+ dev_err(&pdev->dev, "cannot allocate driver data"); -+ return -ENOMEM; -+ } -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) { -+ dev_err(&pdev->dev, "can't get device resources\n"); -+ return -ENOENT; -+ } -+ -+ gpio = of_get_named_gpio_flags(pdev->dev.of_node, "irq-gpios", 0, NULL); -+ if (gpio < 0) { -+ dev_err(&pdev->dev, "can't get irq gpio\n"); -+ return gpio; -+ } -+ -+ ret = gpio_request(gpio, DRIVER_NAME); -+ if (ret) { -+ dev_err(&pdev->dev, "cannot request irq gpio\n"); -+ return ret; -+ } -+ -+ ret = gpio_direction_input(gpio); -+ if (ret) { -+ dev_err(&pdev->dev, "cannot configure irq gpio as input\n"); -+ return ret; -+ } -+ -+ irq = gpio_to_irq(gpio); -+ if (irq <= 0) { -+ dev_err(&pdev->dev, "can't get irq number\n"); -+ return irq < 0 ? irq : -ENOENT; -+ } -+ ddata->irq = irq; -+ -+ ddata->base = devm_request_and_ioremap(&pdev->dev, res); -+ if (!ddata->base) { -+ dev_err(&pdev->dev, "cannot request and ioremap register set\n"); -+ return -EADDRNOTAVAIL; -+ } -+ -+ val = readw(ddata->base + MAGIC); -+ if (val != 0xef32) { -+ dev_err(&pdev->dev, "Magic not found (0x%hx)\n", val); -+ return -ENODEV; -+ } -+ -+ /* disable and clear all irqs */ -+ writew(0, ddata->base + INTEN); -+ writew(0, ddata->base + INTFLAG); -+ -+ /* XXX: enable joystick irq */ -+ writew(4, ddata->base + INTEN); -+ -+ ddata->chip.name = DRIVER_NAME; -+ ddata->chip.irq_ack = efm32board_irq_ack; -+ ddata->chip.irq_mask = efm32board_irq_mask; -+ ddata->chip.irq_unmask = efm32board_irq_unmask; -+ -+ ret = request_irq(irq, efm32board_handler, 0, DRIVER_NAME, ddata); -+ if (ret) -+ goto err_request_irq; -+ -+ ddata->domain = irq_domain_add_simple(pdev->dev.of_node, 5, 0, -+ &efm32board_irqdomain_ops, ddata); -+ if (!ddata->domain) { -+ ret = -ENOMEM; -+ dev_err(&pdev->dev, "cannot create irq domain\n"); -+ -+ free_irq(irq, ddata); -+ } -+err_request_irq: -+ return ret; -+} -+ -+static const struct of_device_id efm32board_dt_ids[] = { -+ { .compatible = "efm32board", }, -+ { /* sentinel */ } -+}; -+ -+static struct platform_driver efm32board_driver = { -+ .probe = efm32board_probe, -+ .driver = { -+ .name = DRIVER_NAME, -+ .owner = THIS_MODULE, -+ .of_match_table = efm32board_dt_ids, -+ }, -+}; -+module_platform_driver(efm32board_driver); diff --git a/patches/linux-3.11-rc1/0008-ARM-v7m-add-trivial-suspend-support.patch b/patches/linux-3.11-rc1/0008-ARM-v7m-add-trivial-suspend-support.patch deleted file mode 100644 index ebfb18e..0000000 --- a/patches/linux-3.11-rc1/0008-ARM-v7m-add-trivial-suspend-support.patch +++ /dev/null @@ -1,71 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Wed, 1 Feb 2012 10:00:00 +0100 -Subject: [PATCH] ARM: v7m: add trivial suspend support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Uwe Kleine-König ---- - arch/arm/Kconfig | 2 +- - arch/arm/kernel/suspend.c | 10 +++++++++- - 2 files changed, 10 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index d788fd6..cecc416 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -2215,7 +2215,7 @@ source "kernel/power/Kconfig" - config ARCH_SUSPEND_POSSIBLE - depends on !ARCH_S5PC100 - depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ -- CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK -+ CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK || CPU_V7M - def_bool y - - config ARM_CPU_SUSPEND -diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c -index 41cf3cb..0cceeb3 100644 ---- a/arch/arm/kernel/suspend.c -+++ b/arch/arm/kernel/suspend.c -@@ -20,11 +20,13 @@ extern void cpu_resume_mmu(void); - */ - int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) - { -- struct mm_struct *mm = current->active_mm; - int ret; -+#ifdef CONFIG_MMU -+ struct mm_struct *mm = current->active_mm; - - if (!idmap_pgd) - return -EINVAL; -+#endif - - /* - * Provide a temporary page table with an identity mapping for -@@ -33,11 +35,13 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) - * back to the correct page tables. - */ - ret = __cpu_suspend(arg, fn); -+#ifdef CONFIG_MMU - if (ret == 0) { - cpu_switch_mm(mm->pgd, mm); - local_flush_bp_all(); - local_flush_tlb_all(); - } -+#endif - - return ret; - } -@@ -61,7 +65,11 @@ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr) - *save_ptr = virt_to_phys(ptr); - - /* This must correspond to the LDM in cpu_resume() assembly */ -+#ifdef CONFIG_MMU - *ptr++ = virt_to_phys(idmap_pgd); -+#else -+ *ptr++ = 0; -+#endif - *ptr++ = sp; - *ptr++ = virt_to_phys(cpu_do_resume); - diff --git a/patches/linux-3.11-rc1/0009-ARM-efm32-add-trivial-suspend-support.patch b/patches/linux-3.11-rc1/0009-ARM-efm32-add-trivial-suspend-support.patch deleted file mode 100644 index f11ea68..0000000 --- a/patches/linux-3.11-rc1/0009-ARM-efm32-add-trivial-suspend-support.patch +++ /dev/null @@ -1,78 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Wed, 1 Feb 2012 10:00:21 +0100 -Subject: [PATCH] ARM: efm32: add trivial suspend support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Uwe Kleine-König ---- - arch/arm/mach-efm32/Makefile | 2 ++ - arch/arm/mach-efm32/pm.c | 50 ++++++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 52 insertions(+) - create mode 100644 arch/arm/mach-efm32/pm.c - -diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile -index d70b093..a7f1102 100644 ---- a/arch/arm/mach-efm32/Makefile -+++ b/arch/arm/mach-efm32/Makefile -@@ -1 +1,3 @@ - obj-y += clk.o common.o dtmachine.o time.o -+ -+obj-$(CONFIG_PM) += pm.o -diff --git a/arch/arm/mach-efm32/pm.c b/arch/arm/mach-efm32/pm.c -new file mode 100644 -index 0000000..282205e ---- /dev/null -+++ b/arch/arm/mach-efm32/pm.c -@@ -0,0 +1,50 @@ -+#include -+#include -+ -+#include -+#include -+ -+#include "cmu.h" -+ -+#define CMU_BASE IOMEM(0x400c8000) -+ -+#define scb_writel(val, addroff) writel(val, BASEADDR_V7M_SCB + addroff) -+ -+static int efm32_suspend_enter(suspend_state_t state) -+{ -+ u32 cmu_status = readl(CMU_BASE + CMU_STATUS); -+ -+ /* -+ * setting SLEEPDEEP makes the efm32 enter EM2 or EM3 (iff both -+ * LFACLK and LFBCLK are off). -+ */ -+ scb_writel(V7M_SCB_SCR_SLEEPDEEP, V7M_SCB_SCR); -+ -+ cpu_do_idle(); -+ -+ scb_writel(0, V7M_SCB_SCR); -+ -+ /* -+ * deep sleep disables the HF oscilator, reenable it if it was on -+ * before. -+ */ -+ if (cmu_status & CMU_STATUS_HFXOSEL) { -+ writel(CMU_OSCENCMD_HFXOEN, CMU_BASE + CMU_OSCENCMD); -+ writel(CMU_CMD_HFCLKSEL_HFXO, CMU_BASE + CMU_CMD); -+ } -+ -+ return 0; -+} -+ -+static const struct platform_suspend_ops efm32_suspend_ops = { -+ .valid = suspend_valid_only_mem, -+ .enter = efm32_suspend_enter, -+}; -+ -+static int __init efm32_pm_init(void) -+{ -+ suspend_set_ops(&efm32_suspend_ops); -+ -+ return 0; -+} -+arch_initcall(efm32_pm_init); diff --git a/patches/linux-3.11-rc1/0010-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch b/patches/linux-3.11-rc1/0010-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch deleted file mode 100644 index 4a512a0..0000000 --- a/patches/linux-3.11-rc1/0010-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch +++ /dev/null @@ -1,306 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Sun, 30 Oct 2011 21:11:05 +0100 -Subject: [PATCH] HACK! ARM: allow a bootloader to be embedded and do it on - efm32 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Uwe Kleine-König ---- - arch/arm/kernel/vmlinux.lds.S | 5 + - arch/arm/mach-efm32/Makefile | 8 ++ - arch/arm/mach-efm32/bootloader.S | 252 +++++++++++++++++++++++++++++++++++++++ - 3 files changed, 265 insertions(+) - create mode 100644 arch/arm/mach-efm32/bootloader.S - -diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S -index fa25e4e..4faed24 100644 ---- a/arch/arm/kernel/vmlinux.lds.S -+++ b/arch/arm/kernel/vmlinux.lds.S -@@ -86,6 +86,11 @@ SECTIONS - #else - . = PAGE_OFFSET + TEXT_OFFSET; - #endif -+ -+ .bootloader : { -+ *(.bootloader) -+ } -+ - .head.text : { - _text = .; - HEAD_TEXT -diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile -index a7f1102..1cb3179 100644 ---- a/arch/arm/mach-efm32/Makefile -+++ b/arch/arm/mach-efm32/Makefile -@@ -1,3 +1,11 @@ -+ifeq ($(CONFIG_FLASH_MEM_BASE),0x00000000) -+obj-y += bootloader.o -+endif -+ -+ifeq ($(CONFIG_USE_OF),y) -+$(obj)/bootloader.o: $(obj)/../boot/dts/efm32gg-dk3750.dtb -+endif -+ - obj-y += clk.o common.o dtmachine.o time.o - - obj-$(CONFIG_PM) += pm.o -diff --git a/arch/arm/mach-efm32/bootloader.S b/arch/arm/mach-efm32/bootloader.S -new file mode 100644 -index 0000000..d4dbf0b ---- /dev/null -+++ b/arch/arm/mach-efm32/bootloader.S -@@ -0,0 +1,252 @@ -+#if defined(CONFIG_OF) -+#define EFM32_USE_OF -+#endif -+#define EFM32_DT_IN_SRAM -+ -+/* UART1 */ -+#define UARTBASE 0x4000e400 -+#define UARTLOCATION 2 -+ -+ .thumb -+ -+ .section ".bootloader","ax" -+ -+ /* M3 Vector table */ -+ .int 0x10001000 @ Initial SP value -+ .int reset + 1 @ Reset -+ -+reset: -+ /* init external RAM, serial port, EBI and stuff */ -+ adr r0, reginit -+1: -+ ldr r1, [r0] -+ ldr r2, [r0, #4] -+ str r2, [r1] -+ add r0, #8 -+ cmp r0, #(reginit_end) -+ blo 1b -+ -+ -+ /* init some BC registers */ -+ adr r0, bcinit -+1: -+ ldrh r1, [r0] -+ ldrh r2, [r0, #2] -+ add r1, r1, #0x80000000 -+ strh r2, [r1] -+ add r0, #4 -+ cmp r0, #(bcinit_end) -+ blo 1b -+ -+ /* give mux some time to enable the level shifter */ -+ ldr r0, =0x4000 -+1: subs r0, r0, #1 -+ bne 1b -+ -+ ldr r0, =(UARTBASE + 0x34) -+ mov r1, 0x55 -+ str r1, [r0] -+ -+ /* Zero PSRAM */ -+ ldr r0, =(0x88000000) -+ ldr r1, =(0x88400000) -+ mov r2, #0 -+ mov r3, #0 -+ mov r4, #0 -+ mov r5, #0 -+1: stmia r0!, {r2-r5} -+ cmp r0, r1 -+ bcc 1b -+ -+ /* assert zeroing succeeded */ -+ ldr r6, =(UARTBASE + 0x34) -+ mov r7, #'<' -+ str r7, [r6] -+ mov r7, #'*' -+ ldr r0, =(0x88000000) -+1: ldmia r0!, {r2-r5} -+ orr r2, r3 -+ orr r4, r5 -+ orr r2, r4 -+ cmp r2, #0 -+ it ne -+ strne r7, [r6] -+ cmp r0, r1 -+ bcc 1b -+ mov r7, #'>' -+ str r7, [r6] -+ -+#if defined(EFM32_USE_OF) && defined(EFM32_DT_IN_SRAM) -+#define dtbaddr 0x10000000 -+ ldr r0, =(dtbaddr) -+ ldr r1, =(dtb) -+ adr r2, dtbend -+ subs r2, r2, r1 -+ bl _memcpy -+#endif -+ /* detect machine type; easy we know this is an efm32gg_dk3750 */ -+ movw r0, #0 -+ movw r1, #0xf11 @ machid for efm32gg_dk3750 -+#ifdef EFM32_USE_OF -+#ifdef EFM32_DT_IN_SRAM -+ ldr r2, =(dtbaddr) -+#else -+ adr r2, dtb -+#endif -+#else -+ adr r2, ataglist -+#endif -+ movw r3, #0 -+ movw r4, #0 -+ movw r5, #0 -+ movw r6, #0 -+ movw r7, #0 -+ -+ b stext -+ -+#ifdef EFM32_DT_IN_SRAM -+_memcpy: -+ @ copies r2 bytes from r1 to r0 with r2 > 0 -+1: -+ ldrb r3, [r1], #1 -+ strb r3, [r0], #1 -+ subs r2, #1 -+ bhi 1b -+ bx lr -+#endif -+ -+ .ltorg -+ -+ .align 3 -+ /* register value pairs to initialize the machine */ -+ .type reginit, %object -+reginit: -+ /* clocks */ -+ .int 0x400C8020, 0x00000004 @ CMU_OSCENCMD |= HFXOEN -+ -+ .int 0x400c8008, 0x00000100 @ CMU_HFPERCLKDIV, reset default -+ .int 0x43900814, 0x00000001 @ CMU_HFCORECLKEN0 |= EBI via bitband -+ .int 0x439008b4, 0x00000001 @ CMU_HFPERCLKEN0 |= GPIO via bitband -+ .int 0x43900884, 0x00000001 @ CMU_HFPERCLKEN0 |= USART1 via bitband -+ .int 0x43900890, 0x00000001 @ CMU_HFPERCLKEN0 |= UART1 via bitband -+ -+ /* XXX */ -+ .int 0x439008c0, 0x00000001 @ CMU_HFPERCLKEN0 |= ADC via bitband -+ -+ /* pinmuxing */ -+ .int 0x40006000, 0x00000000 @ GPIO_PA_CTRL, reset default -+ .int 0x40006014, 0x0000807f @ GPIO_PA_DOUTCLR; EBI AD8..15 set dataout to 0 -+ .int 0x40006004, 0x04444444 @ GPIO_PA_MODEL; EBI AD9..15 set mode=pushpull -+ .int 0x40006008, 0x40000000 @ GPIO_PA_MODEH; EBI AD8 set mode=pushpull -+ .int 0x40006024, 0x00000000 @ GPIO_PB_CTRL, reset default -+ .int 0x40006038, 0x00008000 @ GPIO_PB_DOUTCLR; EBI mode on PB15 MCU_EBI_CONNECT (0) -+ .int 0x40006038, 0x0000007f @ GPIO_PB_DOUTCLR; EBI A16-22 -+ .int 0x40006028, 0x04444444 @ GPIO_PB_MODEL; EBI A16-22 -+ .int 0x40006034, 0x00000200 @ GPIO_PB_DOUTSET; set UART_TX to avoid false start -+ .int 0x4000602c, 0x40000140 @ GPIO_PB_MODEH; MCU_EBI_CONNECT -> output, UART_TX, UART_RX -+ -+ .int 0x40006048, 0x00000000 @ GPIO_PC_CTRL, reset default -+ .int 0x4000605c, 0x00000001 @ GPIO_PC_DOUTCLR; PC11 (EBI_ALE) -+ .int 0x40006050, 0x00004000 @ GPIO_PC_MODEH; PC11: Push-pull output -+ .int 0x4000606c, 0x00000000 @ GPIO_PD_CTRL, reset default -+ .int 0x4000607c, 0x00003e08 @ GPIO_PD_DOUTSET, EBI CS0-3, spiconnect set dataout to 1; ETH_SPI_#CS (D3) -+ .int 0x40006080, 0x00000007 @ GPIO_PD_DOUTCLR, ETH_SPI_{TX, RX, CLK} -+ .int 0x40006070, 0x00004414 @ GPIO_PD_MODEL; ETH_SPI_ -+ .int 0x40006074, 0x00444440 @ GPIO_PD_MODEH; EBI CS0-3, spiconnect set mode=pushpull -+ .int 0x40006090, 0x00000000 @ GPIO_PE_CTRL, reset default -+ .int 0x400060a0, 0x00000001 @ GPIO_PE_DOUTSET; FPGA irq line -+ .int 0x400060a4, 0x0000ff00 @ GPIO_PE_DOUTCLR; EBI AD0..7 set dataout to 0 -+ .int 0x40006094, 0x00000002 @ GPIO_PE_MODEL; FPGA irq line set mode=inputpull -+ .int 0x40006098, 0x44444444 @ GPIO_PE_MODEH; EBI AD0..7 set mode=pushpull -+ -+ .int 0x400060b4, 0x00000000 @ GPIO_PF_CTRL, reset default -+ .int 0x400060c8, 0x000003c0 @ GPIO_PF_DOUTCLR; EBI Wen+Ren set dataout to 0 -+ .int 0x400060b8, 0x44000000 @ GPIO_PF_MODEL; EBI Byte Lane 0 support BL0/BL1 -+ .int 0x400060bc, 0x00000044 @ GPIO_PF_MODEH; EBI WEN, REN -+ -+ .int 0x40006100, 0x00000004 @ GPIO_EXTIPSELL: select port E for irq 0 -+ .int 0x4000610c, 0x00000001 @ GPIO_EXTIFALL: trigger for falling FPGA irq line -+ .int 0x4000611c, 0x0000ffff @ ? GPIO_IFC: clear all irqs -+ .int 0x40006110, 0x00000001 @ GPIO_IEN: enable irq 0 -+ -+ /* EBI */ -+ .int 0x40008000, 0x4f00d051 @ EBI_CTRL, enable ITS, mode0=mode2=mode3=D16A16ALE, bl0-3, noidle[023] -+ /* EBI PSRAM */ -+ .int 0x40008028, 0x10000000 @ EBI_ADDRTIMING2; HALFALE -+ .int 0x4000802c, 0x20000400 @ EBI_RDTIMING2; Prefetch, StrobeCycles = 4, HoldCycles = SetupCycles = 0 -+ .int 0x40008030, 0x00000200 @ EBI_WRTIMING2; StrobeCycles = 2, HoldCycles = SetupCycles = 0 -+ .int 0x40008034, 0x00000008 @ EBI_POLARITY2, ARDY_, ALE, WE_, RE_, CS_, BL_ -+ -+ /* Board Control FPGA */ -+ .int 0x40008004, 0x10000303 @ EBI_ADDRTIMING; HALFALE, HoldCycles = SetupCycles = 3 -+ .int 0x40008008, 0x00030703 @ EBI_RDTIMING; StrobeCycles = 7, HoldCycles = SetupCycles = 3 -+ .int 0x4000800c, 0x00030703 @ EBI_WRTIMING; StrobeCycles = 7, HoldCycles = SetupCycles = 3 -+ .int 0x40008010, 0x00000008 @ EBI_POLARITY, ARDY_, ALE, WE_, RE_, CS_, BL_ -+ -+ /* external NOR flash */ -+ .int 0x40008038, 0x10000000 @ EBI_ADDRTIMING3; HALFALE, HoldCycles = SetupCycles = 0 -+ .int 0x4000803c, 0x00000700 @ EBI_RDTIMING3; StrobeCycles = 7, HoldCycles = SetupCycles = 0 -+ .int 0x40008040, 0x00000200 @ EBI_WRTIMING3; StrobeCycles = 2, HoldCycles = SetupCycles =0 -+ .int 0x40008044, 0x00000008 @ EBI_POLARITY3, ARDY_, ALE, WE_, RE_, CS_, BL_ -+ -+ .int 0x40008014, 0x105e00bb @ EBI_ROUTE -+ .int 0x40008000, 0x4f00dd51 @ EBI_CTRL, enable ITS, mode0=mode2=mode3=D16A16ALE, bl0-3, noidle[023], bank[023]en -+ -+ .int UARTBASE + 0x00, 0x00000000 @ UART1_CTRL -+ .int UARTBASE + 0x04, 0x00001005 @ UART1_FRAME -+ .int UARTBASE + 0x14, 0x00001900 @ UART1_CLKDIV -+ .int UARTBASE + 0x0c, 0x00000c04 @ UART1_CMD -+ .int UARTBASE + 0x54, 0x00000003 + (UARTLOCATION << 8) @ UART1_ROUTE -+ .int 0x400c8024, 0x00000002 @ CMU_CMD = HFCLKSEL_HFXO -+ -+reginit_end: -+ .size reginit, . - reginit -+ -+ .align 3 -+ /* register value pairs to initialize the board controller */ -+ .type bcinit, %object -+bcinit: -+ .short 0x0018, 0x1300 @ enable UART mux and ETH -+ .short 0x0014, 0x0001 @ / -+ .short 0x001a, 0x0001 @ ETH -+ -+bcinit_end: -+ .size bcinit, . - bcinit -+ -+ .align 3 -+#ifdef EFM32_USE_OF -+ .type dtb, %object -+dtb: -+ .incbin "arch/arm/boot/dts/efm32gg-dk3750.dtb" -+dtbend: -+ .size dtb, . - dtb -+ .align 3 -+ -+#else /* ifdef CONFIG_OF */ -+ -+ .type ataglist, %object -+ataglist: -+ /* ATAG_CORE */ -+ .int 0x00000005 /* .size */ -+ .int 0x54410001 /* .tag = ATAG_CORE */ -+ .int 0x00000001 /* .flags */ -+ .int 0x00001000 /* .pagesize */ -+ .int 0x000000ff /* .rootdev */ -+ /* ATAG_MEM */ -+ .int 0x00000004 /* .size */ -+ .int 0x54410002 /* .tag = ATAG_MEM */ -+ .int 0x00400000 /* .size = 4 MiB */ -+ .int 0x88000000 /* .start = SRAM_BASE */ -+ /* ATAG_CMDLINE */ -+cmdline: -+ .int (cmdline_end - cmdline) >> 2 /* .size */ -+ .int 0x54410009 /* .tag = ATAG_CMDLINE */ -+ .asciz "console=ttyefm4,115200 ignore_loglevel ihash_entries=64 dhash_entries=64 rootfstype=romfs init=/linuxrc uclinux.physaddr=0x8c000000 root=/dev/mtdblock0 earlyprintk" -+ .align 2, 0 -+cmdline_end: -+ /* ATAG_NONE */ -+ .int 0x00000000 /* .size */ -+ .int 0x00000000 /* .tag = ATAG_NONE */ -+ataglist_end: -+ .size ataglist, . - ataglist -+#endif /* ifdef CONFIG_OF / else */ diff --git a/patches/linux-3.11-rc1/0011-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch b/patches/linux-3.11-rc1/0011-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch deleted file mode 100644 index 8cc2ad6..0000000 --- a/patches/linux-3.11-rc1/0011-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch +++ /dev/null @@ -1,31 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Tue, 13 Dec 2011 21:37:46 +0100 -Subject: [PATCH] HACK! don't reserve memory for device tree if it's below - PHYS_OFFSET -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This allows to keep the device tree blob in the unregistered 128k SRAM -on efm32. - -Signed-off-by: Uwe Kleine-König ---- - arch/arm/kernel/devtree.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c -index 5859c8b..134e0c8 100644 ---- a/arch/arm/kernel/devtree.c -+++ b/arch/arm/kernel/devtree.c -@@ -43,6 +43,10 @@ void __init arm_dt_memblock_reserve(void) - if (!initial_boot_params) - return; - -+ if ((unsigned long)initial_boot_params < PHYS_OFFSET) -+ /* assume the dtb is located in ro memory */ -+ return; -+ - /* Reserve the dtb region */ - memblock_reserve(virt_to_phys(initial_boot_params), - be32_to_cpu(initial_boot_params->totalsize)); diff --git a/patches/linux-3.11-rc1/0012-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch b/patches/linux-3.11-rc1/0012-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch deleted file mode 100644 index 8e3c0c7..0000000 --- a/patches/linux-3.11-rc1/0012-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Wed, 14 Dec 2011 11:03:48 +0100 -Subject: [PATCH] HACK! make stack dumps provoked by BUG a bit more helpful -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -the right fix would be to continue unwinding at the end when process is -in handler mode - -Signed-off-by: Uwe Kleine-König ---- - arch/arm/kernel/process.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c -index d3ca4f6..51e29b1 100644 ---- a/arch/arm/kernel/process.c -+++ b/arch/arm/kernel/process.c -@@ -301,11 +301,13 @@ void __show_regs(struct pt_regs *regs) - #endif - } - -+#include -+ - void show_regs(struct pt_regs * regs) - { - printk("\n"); - __show_regs(regs); -- dump_stack(); -+ unwind_backtrace(regs, current); - } - - ATOMIC_NOTIFIER_HEAD(thread_notify_head); diff --git a/patches/linux-3.11-rc1/0013-HACK-ARM-increase-TASK_SIZE-for-MMU.patch b/patches/linux-3.11-rc1/0013-HACK-ARM-increase-TASK_SIZE-for-MMU.patch deleted file mode 100644 index c70676b..0000000 --- a/patches/linux-3.11-rc1/0013-HACK-ARM-increase-TASK_SIZE-for-MMU.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Thu, 4 Oct 2012 13:32:51 +0200 -Subject: [PATCH] HACK: ARM: increase TASK_SIZE for !MMU -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is needed for strncpy_from_user and friends since - - 8c56cc8 (ARM: 7449/1: use generic strnlen_user and strncpy_from_user functions) - -Signed-off-by: Uwe Kleine-König ---- - arch/arm/include/asm/memory.h | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h -index e750a93..f0155d4 100644 ---- a/arch/arm/include/asm/memory.h -+++ b/arch/arm/include/asm/memory.h -@@ -91,9 +91,12 @@ - * It is difficult to define and perhaps will never meet the original meaning - * of this define that was meant to. - * Fortunately, there is no reference for this in noMMU mode, for now. -+ * -+ * HACK: copy_from_user must even handle copying from flash. So don't impose a -+ * limit at all. Not sure this is correct ... - */ - #ifndef TASK_SIZE --#define TASK_SIZE (CONFIG_DRAM_SIZE) -+#define TASK_SIZE (~0UL) - #endif - - #ifndef TASK_UNMAPPED_BASE diff --git a/patches/linux-3.11-rc1/0014-HACK-work-around-for-big-images.patch b/patches/linux-3.11-rc1/0014-HACK-work-around-for-big-images.patch deleted file mode 100644 index bcb94c1..0000000 --- a/patches/linux-3.11-rc1/0014-HACK-work-around-for-big-images.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Thu, 7 Feb 2013 09:43:24 +0100 -Subject: [PATCH] HACK! work around for big images - ---- - arch/arm/kernel/head-nommu.S | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S -index 75f14cc..dea3a4d 100644 ---- a/arch/arm/kernel/head-nommu.S -+++ b/arch/arm/kernel/head-nommu.S -@@ -64,6 +64,7 @@ ENTRY(stext) - #endif - bl __lookup_processor_type @ r5=procinfo r9=cpuid - movs r10, r5 @ invalid processor (r5=0)? -+ it eq - beq __error_p @ yes, error 'p' - - #ifdef CONFIG_ARM_MPU diff --git a/patches/linux-3.11-rc1/0015-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch b/patches/linux-3.11-rc1/0015-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch deleted file mode 100644 index f00e428..0000000 --- a/patches/linux-3.11-rc1/0015-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch +++ /dev/null @@ -1,30 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Wed, 17 Apr 2013 11:52:22 +0200 -Subject: [PATCH] HACK! make printhex and printch work on efm32 with XIP - -On XIP the kernel image is readonly, so is the hexbuf array. Use some -SRAM instead. ---- - arch/arm/kernel/debug.S | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S -index 14f7c3b..e18cb30 100644 ---- a/arch/arm/kernel/debug.S -+++ b/arch/arm/kernel/debug.S -@@ -56,6 +56,7 @@ ENDPROC(printhex4) - ENTRY(printhex2) - mov r1, #2 - printhex: adr r2, hexbuf -+ ldr r2, =0x2001f000 - add r3, r2, r1 - mov r1, #0 - strb r1, [r3] -@@ -121,6 +122,7 @@ ENDPROC(printascii) - - ENTRY(printch) - adr r1, hexbuf -+ ldr r1, =0x2001f000 - strb r0, [r1] - mov r0, #0x03 @ SYS_WRITEC - ARM( svc #0x123456 ) diff --git a/patches/linux-3.11-rc1/0016-wip.patch b/patches/linux-3.11-rc1/0016-wip.patch deleted file mode 100644 index ec2c03a..0000000 --- a/patches/linux-3.11-rc1/0016-wip.patch +++ /dev/null @@ -1,21 +0,0 @@ -From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= -Date: Mon, 11 Mar 2013 16:10:49 +0100 -Subject: [PATCH] wip - ---- - drivers/mfd/efm32board.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/mfd/efm32board.c b/drivers/mfd/efm32board.c -index ae35916..6270826 100644 ---- a/drivers/mfd/efm32board.c -+++ b/drivers/mfd/efm32board.c -@@ -64,6 +64,8 @@ static irqreturn_t efm32board_handler(int irq, void *data) - /* ack BC irq */ - writew(0, ddata->base + INTFLAG); - -+ pr_info("%s: INTFLAG=%hx\n", __func__, val); -+ - while (val) { - int line = __fls(val); - diff --git a/patches/linux-3.11-rc1/series b/patches/linux-3.11-rc1/series deleted file mode 100644 index 5d9cd57..0000000 --- a/patches/linux-3.11-rc1/series +++ /dev/null @@ -1,19 +0,0 @@ -# generated by git-ptx-patches -#tag:base --start-number 1 -0001-ARM-ARMv7-M-Fix-name-of-NVIC-handler-function.patch -0002-hwmon-efm32-adc-new-driver.patch -0003-spi-new-controller-driver-for-efm32-SoCs.patch -0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch -0005-ARM-efm32-some-more-stuff.patch -0006-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch -0007-efm-board-controller-driver.patch -0008-ARM-v7m-add-trivial-suspend-support.patch -0009-ARM-efm32-add-trivial-suspend-support.patch -0010-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch -0011-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch -0012-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch -0013-HACK-ARM-increase-TASK_SIZE-for-MMU.patch -0014-HACK-work-around-for-big-images.patch -0015-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch -0016-wip.patch -# 4743f5d01c1a04dcd0ceba9fde284053 - git-ptx-patches magic diff --git a/patches/linux-3.12-rc4/0001-ARM-v7-M-drop-using-mach-entry-macro.S.patch b/patches/linux-3.12-rc4/0001-ARM-v7-M-drop-using-mach-entry-macro.S.patch new file mode 100644 index 0000000..b52a045 --- /dev/null +++ b/patches/linux-3.12-rc4/0001-ARM-v7-M-drop-using-mach-entry-macro.S.patch @@ -0,0 +1,29 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 4 Nov 2013 10:08:35 +0100 +Subject: [PATCH] ARM: v7-M: drop using mach/entry-macro.S +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The only v7-M platform only has some unused stubs in its +mach/entry-macro.S file. So don't include it which allows efm32 to drop +the file. + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/kernel/entry-v7m.S | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S +index 52b2643..2260f18 100644 +--- a/arch/arm/kernel/entry-v7m.S ++++ b/arch/arm/kernel/entry-v7m.S +@@ -14,8 +14,6 @@ + #include + #include + +-#include +- + #include "entry-header.S" + + #ifdef CONFIG_TRACE_IRQFLAGS diff --git a/patches/linux-3.12-rc4/0002-ARM-deprecate-mach-timex.h-for-ARCH_MULTIPLATFORM.patch b/patches/linux-3.12-rc4/0002-ARM-deprecate-mach-timex.h-for-ARCH_MULTIPLATFORM.patch new file mode 100644 index 0000000..3f6d54b --- /dev/null +++ b/patches/linux-3.12-rc4/0002-ARM-deprecate-mach-timex.h-for-ARCH_MULTIPLATFORM.patch @@ -0,0 +1,869 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 21 Oct 2013 11:07:04 +0200 +Subject: [PATCH] ARM: deprecate mach/timex.h for !ARCH_MULTIPLATFORM +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +While mach/timex.h isn't used for multi-platform builds it still is for +"normal" builds. As there are only three platforms that do something else +than only defining CLOCK_TICK_RATE (and these are probably easy to fix), +deprecate mach/timex.h and drop the corresponding files. + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/Kconfig | 15 ++++++++++++ + arch/arm/include/asm/timex.h | 6 ++--- + arch/arm/mach-clps711x/include/mach/timex.h | 2 -- + arch/arm/mach-davinci/include/mach/timex.h | 22 ------------------ + arch/arm/mach-dove/include/mach/timex.h | 9 -------- + arch/arm/mach-ebsa110/include/mach/timex.h | 19 --------------- + arch/arm/mach-exynos/include/mach/timex.h | 29 ----------------------- + arch/arm/mach-footbridge/include/mach/timex.h | 18 --------------- + arch/arm/mach-gemini/include/mach/timex.h | 13 ----------- + arch/arm/mach-integrator/include/mach/timex.h | 26 --------------------- + arch/arm/mach-iop13xx/include/mach/timex.h | 1 - + arch/arm/mach-iop32x/include/mach/timex.h | 6 ----- + arch/arm/mach-iop33x/include/mach/timex.h | 6 ----- + arch/arm/mach-kirkwood/include/mach/timex.h | 10 -------- + arch/arm/mach-lpc32xx/include/mach/timex.h | 28 ----------------------- + arch/arm/mach-msm/include/mach/timex.h | 21 ----------------- + arch/arm/mach-mv78xx0/include/mach/timex.h | 9 -------- + arch/arm/mach-omap1/include/mach/timex.h | 5 ---- + arch/arm/mach-omap2/include/mach/timex.h | 5 ---- + arch/arm/mach-orion5x/include/mach/timex.h | 11 --------- + arch/arm/mach-realview/include/mach/timex.h | 23 ------------------- + arch/arm/mach-s3c24xx/include/mach/timex.h | 24 ------------------- + arch/arm/mach-s3c64xx/include/mach/timex.h | 24 ------------------- + arch/arm/mach-s5p64x0/include/mach/timex.h | 27 ---------------------- + arch/arm/mach-s5pc100/include/mach/timex.h | 24 ------------------- + arch/arm/mach-s5pv210/include/mach/timex.h | 29 ----------------------- + arch/arm/mach-shark/include/mach/timex.h | 7 ------ + arch/arm/mach-shmobile/include/mach/timex.h | 6 ----- + arch/arm/mach-spear/include/mach/timex.h | 19 --------------- + arch/arm/mach-versatile/include/mach/timex.h | 23 ------------------- + arch/arm/mach-w90x900/include/mach/timex.h | 25 -------------------- + arch/arm/plat-omap/include/plat/timex.h | 33 --------------------------- + 32 files changed, 18 insertions(+), 507 deletions(-) + delete mode 100644 arch/arm/mach-clps711x/include/mach/timex.h + delete mode 100644 arch/arm/mach-davinci/include/mach/timex.h + delete mode 100644 arch/arm/mach-dove/include/mach/timex.h + delete mode 100644 arch/arm/mach-ebsa110/include/mach/timex.h + delete mode 100644 arch/arm/mach-exynos/include/mach/timex.h + delete mode 100644 arch/arm/mach-footbridge/include/mach/timex.h + delete mode 100644 arch/arm/mach-gemini/include/mach/timex.h + delete mode 100644 arch/arm/mach-integrator/include/mach/timex.h + delete mode 100644 arch/arm/mach-iop13xx/include/mach/timex.h + delete mode 100644 arch/arm/mach-iop32x/include/mach/timex.h + delete mode 100644 arch/arm/mach-iop33x/include/mach/timex.h + delete mode 100644 arch/arm/mach-kirkwood/include/mach/timex.h + delete mode 100644 arch/arm/mach-lpc32xx/include/mach/timex.h + delete mode 100644 arch/arm/mach-msm/include/mach/timex.h + delete mode 100644 arch/arm/mach-mv78xx0/include/mach/timex.h + delete mode 100644 arch/arm/mach-omap1/include/mach/timex.h + delete mode 100644 arch/arm/mach-omap2/include/mach/timex.h + delete mode 100644 arch/arm/mach-orion5x/include/mach/timex.h + delete mode 100644 arch/arm/mach-realview/include/mach/timex.h + delete mode 100644 arch/arm/mach-s3c24xx/include/mach/timex.h + delete mode 100644 arch/arm/mach-s3c64xx/include/mach/timex.h + delete mode 100644 arch/arm/mach-s5p64x0/include/mach/timex.h + delete mode 100644 arch/arm/mach-s5pc100/include/mach/timex.h + delete mode 100644 arch/arm/mach-s5pv210/include/mach/timex.h + delete mode 100644 arch/arm/mach-shark/include/mach/timex.h + delete mode 100644 arch/arm/mach-shmobile/include/mach/timex.h + delete mode 100644 arch/arm/mach-spear/include/mach/timex.h + delete mode 100644 arch/arm/mach-versatile/include/mach/timex.h + delete mode 100644 arch/arm/mach-w90x900/include/mach/timex.h + delete mode 100644 arch/arm/plat-omap/include/plat/timex.h + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 1ad6fb6..f480753 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -260,6 +260,12 @@ config NEED_MACH_MEMORY_H + definitions for this platform. The need for mach/memory.h should + be avoided when possible. + ++config NEED_MACH_TIMEX_H ++ bool ++ help ++ Select this when mach/timex.h is required to provide special ++ definitions for this platform. This should be avoided when possible. ++ + config PHYS_OFFSET + hex "Physical address of main memory" if MMU + depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H +@@ -362,6 +368,7 @@ config ARCH_AT91 + select IRQ_DOMAIN + select NEED_MACH_GPIO_H + select NEED_MACH_IO_H if PCCARD ++ select NEED_MACH_TIMEX_H + select PINCTRL + select PINCTRL_AT91 if USE_OF + help +@@ -416,6 +423,7 @@ config ARCH_EP93XX + select CLKDEV_LOOKUP + select CPU_ARM920T + select NEED_MACH_MEMORY_H ++ select NEED_MACH_TIMEX_H + help + This enables support for the Cirrus EP93xx series of CPUs. + +@@ -437,6 +445,7 @@ config ARCH_NETX + select CLKSRC_MMIO + select CPU_ARM926T + select GENERIC_CLOCKEVENTS ++ select NEED_MACH_TIMEX_H + help + This enables support for systems based on the Hilscher NetX Soc + +@@ -488,6 +497,7 @@ config ARCH_IXP4XX + select GENERIC_CLOCKEVENTS + select MIGHT_HAVE_PCI + select NEED_MACH_IO_H ++ select NEED_MACH_TIMEX_H + select USB_EHCI_BIG_ENDIAN_DESC + select USB_EHCI_BIG_ENDIAN_MMIO + help +@@ -560,6 +570,7 @@ config ARCH_MMP + select IRQ_DOMAIN + select MULTI_IRQ_HANDLER + select NEED_MACH_GPIO_H ++ select NEED_MACH_TIMEX_H + select PINCTRL + select PLAT_PXA + select SPARSE_IRQ +@@ -573,6 +584,7 @@ config ARCH_KS8695 + select CPU_ARM922T + select GENERIC_CLOCKEVENTS + select NEED_MACH_MEMORY_H ++ select NEED_MACH_TIMEX_H + help + Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based + System-on-Chip devices. +@@ -623,6 +635,7 @@ config ARCH_PXA + select HAVE_IDE + select MULTI_IRQ_HANDLER + select NEED_MACH_GPIO_H ++ select NEED_MACH_TIMEX_H + select PLAT_PXA + select SPARSE_IRQ + help +@@ -673,6 +686,7 @@ config ARCH_RPC + select ISA_DMA_API + select NEED_MACH_IO_H + select NEED_MACH_MEMORY_H ++ select NEED_MACH_TIMEX_H + select NO_IOPORT + select VIRT_TO_BUS + help +@@ -694,6 +708,7 @@ config ARCH_SA1100 + select ISA + select NEED_MACH_GPIO_H + select NEED_MACH_MEMORY_H ++ select NEED_MACH_TIMEX_H + select SPARSE_IRQ + help + Support for StrongARM 11x0 based boards. +diff --git a/arch/arm/include/asm/timex.h b/arch/arm/include/asm/timex.h +index 83f2aa8..5e65662 100644 +--- a/arch/arm/include/asm/timex.h ++++ b/arch/arm/include/asm/timex.h +@@ -12,10 +12,10 @@ + #ifndef _ASMARM_TIMEX_H + #define _ASMARM_TIMEX_H + +-#ifdef CONFIG_ARCH_MULTIPLATFORM +-#define CLOCK_TICK_RATE 1000000 +-#else ++#ifdef CONFIG_NEED_MACH_TIMEX_H + #include ++#else ++#define CLOCK_TICK_RATE 1000000 + #endif + + typedef unsigned long cycles_t; +diff --git a/arch/arm/mach-clps711x/include/mach/timex.h b/arch/arm/mach-clps711x/include/mach/timex.h +deleted file mode 100644 +index de6fd19..0000000 +--- a/arch/arm/mach-clps711x/include/mach/timex.h ++++ /dev/null +@@ -1,2 +0,0 @@ +-/* Bogus value */ +-#define CLOCK_TICK_RATE 512000 +diff --git a/arch/arm/mach-davinci/include/mach/timex.h b/arch/arm/mach-davinci/include/mach/timex.h +deleted file mode 100644 +index 9b88529..0000000 +--- a/arch/arm/mach-davinci/include/mach/timex.h ++++ /dev/null +@@ -1,22 +0,0 @@ +-/* +- * DaVinci timer defines +- * +- * Author: Kevin Hilman, MontaVista Software, Inc. +- * +- * 2007 (c) MontaVista Software, Inc. This file is licensed under +- * the terms of the GNU General Public License version 2. This program +- * is licensed "as is" without any warranty of any kind, whether express +- * or implied. +- */ +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H +- +-/* +- * Alert: Not all timers of the DaVinci family run at a frequency of 27MHz, +- * but we should be fine as long as CLOCK_TICK_RATE or LATCH (see include/ +- * linux/jiffies.h) are not used directly in code. Currently none of the +- * code relevant to DaVinci platform depends on these values directly. +- */ +-#define CLOCK_TICK_RATE 27000000 +- +-#endif /* __ASM_ARCH_TIMEX_H__ */ +diff --git a/arch/arm/mach-dove/include/mach/timex.h b/arch/arm/mach-dove/include/mach/timex.h +deleted file mode 100644 +index 251d538..0000000 +--- a/arch/arm/mach-dove/include/mach/timex.h ++++ /dev/null +@@ -1,9 +0,0 @@ +-/* +- * arch/arm/mach-dove/include/mach/timex.h +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ +- +-#define CLOCK_TICK_RATE (100 * HZ) +diff --git a/arch/arm/mach-ebsa110/include/mach/timex.h b/arch/arm/mach-ebsa110/include/mach/timex.h +deleted file mode 100644 +index 4fb43b2..0000000 +--- a/arch/arm/mach-ebsa110/include/mach/timex.h ++++ /dev/null +@@ -1,19 +0,0 @@ +-/* +- * arch/arm/mach-ebsa110/include/mach/timex.h +- * +- * Copyright (C) 1997, 1998 Russell King +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +- * +- * EBSA110 architecture timex specifications +- */ +- +-/* +- * On the EBSA, the clock ticks at weird rates. +- * This is therefore not used to calculate the +- * divisor. +- */ +-#define CLOCK_TICK_RATE 47894000 +- +diff --git a/arch/arm/mach-exynos/include/mach/timex.h b/arch/arm/mach-exynos/include/mach/timex.h +deleted file mode 100644 +index 6d13875..0000000 +--- a/arch/arm/mach-exynos/include/mach/timex.h ++++ /dev/null +@@ -1,29 +0,0 @@ +-/* linux/arch/arm/mach-exynos4/include/mach/timex.h +- * +- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. +- * http://www.samsung.com +- * +- * Copyright (c) 2003-2010 Simtec Electronics +- * Ben Dooks +- * +- * Based on arch/arm/mach-s5p6442/include/mach/timex.h +- * +- * EXYNOS4 - time parameters +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +-*/ +- +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H __FILE__ +- +-/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it +- * a variable is useless. It seems as long as we make our timers an +- * exact multiple of HZ, any value that makes a 1->1 correspondence +- * for the time conversion functions to/from jiffies is acceptable. +-*/ +- +-#define CLOCK_TICK_RATE 12000000 +- +-#endif /* __ASM_ARCH_TIMEX_H */ +diff --git a/arch/arm/mach-footbridge/include/mach/timex.h b/arch/arm/mach-footbridge/include/mach/timex.h +deleted file mode 100644 +index d0fea9d..0000000 +--- a/arch/arm/mach-footbridge/include/mach/timex.h ++++ /dev/null +@@ -1,18 +0,0 @@ +-/* +- * arch/arm/mach-footbridge/include/mach/timex.h +- * +- * Copyright (C) 1998 Russell King +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +- * +- * EBSA285 architecture timex specifications +- */ +- +-/* +- * We assume a constant here; this satisfies the maths in linux/timex.h +- * and linux/time.h. CLOCK_TICK_RATE is actually system dependent, but +- * this must be a constant. +- */ +-#define CLOCK_TICK_RATE (50000000/16) +diff --git a/arch/arm/mach-gemini/include/mach/timex.h b/arch/arm/mach-gemini/include/mach/timex.h +deleted file mode 100644 +index dc5690b..0000000 +--- a/arch/arm/mach-gemini/include/mach/timex.h ++++ /dev/null +@@ -1,13 +0,0 @@ +-/* +- * Gemini timex specifications +- * +- * Copyright (C) 2008-2009 Paulius Zaleckas +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- */ +- +-/* When AHB bus frequency is 150MHz */ +-#define CLOCK_TICK_RATE 38000000 +diff --git a/arch/arm/mach-integrator/include/mach/timex.h b/arch/arm/mach-integrator/include/mach/timex.h +deleted file mode 100644 +index 1dcb420..0000000 +--- a/arch/arm/mach-integrator/include/mach/timex.h ++++ /dev/null +@@ -1,26 +0,0 @@ +-/* +- * arch/arm/mach-integrator/include/mach/timex.h +- * +- * Integrator architecture timex specifications +- * +- * Copyright (C) 1999 ARM Limited +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License +- * along with this program; if not, write to the Free Software +- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +- */ +- +-/* +- * ?? +- */ +-#define CLOCK_TICK_RATE (50000000 / 16) +diff --git a/arch/arm/mach-iop13xx/include/mach/timex.h b/arch/arm/mach-iop13xx/include/mach/timex.h +deleted file mode 100644 +index 45fb274..0000000 +--- a/arch/arm/mach-iop13xx/include/mach/timex.h ++++ /dev/null +@@ -1 +0,0 @@ +-#define CLOCK_TICK_RATE (100 * HZ) +diff --git a/arch/arm/mach-iop32x/include/mach/timex.h b/arch/arm/mach-iop32x/include/mach/timex.h +deleted file mode 100644 +index 7262ab8..0000000 +--- a/arch/arm/mach-iop32x/include/mach/timex.h ++++ /dev/null +@@ -1,6 +0,0 @@ +-/* +- * arch/arm/mach-iop32x/include/mach/timex.h +- * +- * IOP32x architecture timex specifications +- */ +-#define CLOCK_TICK_RATE (100 * HZ) +diff --git a/arch/arm/mach-iop33x/include/mach/timex.h b/arch/arm/mach-iop33x/include/mach/timex.h +deleted file mode 100644 +index 54c5890..0000000 +--- a/arch/arm/mach-iop33x/include/mach/timex.h ++++ /dev/null +@@ -1,6 +0,0 @@ +-/* +- * arch/arm/mach-iop33x/include/mach/timex.h +- * +- * IOP3xx architecture timex specifications +- */ +-#define CLOCK_TICK_RATE (100 * HZ) +diff --git a/arch/arm/mach-kirkwood/include/mach/timex.h b/arch/arm/mach-kirkwood/include/mach/timex.h +deleted file mode 100644 +index c923cd1..0000000 +--- a/arch/arm/mach-kirkwood/include/mach/timex.h ++++ /dev/null +@@ -1,10 +0,0 @@ +-/* +- * arch/arm/mach-kirkwood/include/mach/timex.h +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ +- +-#define CLOCK_TICK_RATE (100 * HZ) +- +diff --git a/arch/arm/mach-lpc32xx/include/mach/timex.h b/arch/arm/mach-lpc32xx/include/mach/timex.h +deleted file mode 100644 +index 8d4066b..0000000 +--- a/arch/arm/mach-lpc32xx/include/mach/timex.h ++++ /dev/null +@@ -1,28 +0,0 @@ +-/* +- * arch/arm/mach-lpc32xx/include/mach/timex.h +- * +- * Author: Kevin Wells +- * +- * Copyright (C) 2010 NXP Semiconductors +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- */ +- +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H +- +-/* +- * Rate in Hz of the main system oscillator. This value should match +- * the value 'MAIN_OSC_FREQ' in platform.h +- */ +-#define CLOCK_TICK_RATE 13000000 +- +-#endif +diff --git a/arch/arm/mach-msm/include/mach/timex.h b/arch/arm/mach-msm/include/mach/timex.h +deleted file mode 100644 +index a62e6b2..0000000 +--- a/arch/arm/mach-msm/include/mach/timex.h ++++ /dev/null +@@ -1,21 +0,0 @@ +-/* arch/arm/mach-msm/include/mach/timex.h +- * +- * Copyright (C) 2007 Google, Inc. +- * +- * This software is licensed under the terms of the GNU General Public +- * License version 2, as published by the Free Software Foundation, and +- * may be copied, distributed, and modified under those terms. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- */ +- +-#ifndef __ASM_ARCH_MSM_TIMEX_H +-#define __ASM_ARCH_MSM_TIMEX_H +- +-#define CLOCK_TICK_RATE 1000000 +- +-#endif +diff --git a/arch/arm/mach-mv78xx0/include/mach/timex.h b/arch/arm/mach-mv78xx0/include/mach/timex.h +deleted file mode 100644 +index 0e8c443..0000000 +--- a/arch/arm/mach-mv78xx0/include/mach/timex.h ++++ /dev/null +@@ -1,9 +0,0 @@ +-/* +- * arch/arm/mach-mv78xx0/include/mach/timex.h +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ +- +-#define CLOCK_TICK_RATE (100 * HZ) +diff --git a/arch/arm/mach-omap1/include/mach/timex.h b/arch/arm/mach-omap1/include/mach/timex.h +deleted file mode 100644 +index 4793790..0000000 +--- a/arch/arm/mach-omap1/include/mach/timex.h ++++ /dev/null +@@ -1,5 +0,0 @@ +-/* +- * arch/arm/mach-omap1/include/mach/timex.h +- */ +- +-#include +diff --git a/arch/arm/mach-omap2/include/mach/timex.h b/arch/arm/mach-omap2/include/mach/timex.h +deleted file mode 100644 +index de9f8fc..0000000 +--- a/arch/arm/mach-omap2/include/mach/timex.h ++++ /dev/null +@@ -1,5 +0,0 @@ +-/* +- * arch/arm/mach-omap2/include/mach/timex.h +- */ +- +-#include +diff --git a/arch/arm/mach-orion5x/include/mach/timex.h b/arch/arm/mach-orion5x/include/mach/timex.h +deleted file mode 100644 +index 4c69820..0000000 +--- a/arch/arm/mach-orion5x/include/mach/timex.h ++++ /dev/null +@@ -1,11 +0,0 @@ +-/* +- * arch/arm/mach-orion5x/include/mach/timex.h +- * +- * Tzachi Perelstein +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ +- +-#define CLOCK_TICK_RATE (100 * HZ) +diff --git a/arch/arm/mach-realview/include/mach/timex.h b/arch/arm/mach-realview/include/mach/timex.h +deleted file mode 100644 +index 4eeb069..0000000 +--- a/arch/arm/mach-realview/include/mach/timex.h ++++ /dev/null +@@ -1,23 +0,0 @@ +-/* +- * arch/arm/mach-realview/include/mach/timex.h +- * +- * RealView architecture timex specifications +- * +- * Copyright (C) 2003 ARM Limited +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License +- * along with this program; if not, write to the Free Software +- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +- */ +- +-#define CLOCK_TICK_RATE (50000000 / 16) +diff --git a/arch/arm/mach-s3c24xx/include/mach/timex.h b/arch/arm/mach-s3c24xx/include/mach/timex.h +deleted file mode 100644 +index fe9ca1f..0000000 +--- a/arch/arm/mach-s3c24xx/include/mach/timex.h ++++ /dev/null +@@ -1,24 +0,0 @@ +-/* arch/arm/mach-s3c2410/include/mach/timex.h +- * +- * Copyright (c) 2003-2005 Simtec Electronics +- * Ben Dooks +- * +- * S3C2410 - time parameters +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +-*/ +- +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H +- +-/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it +- * a variable is useless. It seems as long as we make our timers an +- * exact multiple of HZ, any value that makes a 1->1 correspondence +- * for the time conversion functions to/from jiffies is acceptable. +-*/ +- +-#define CLOCK_TICK_RATE 12000000 +- +-#endif /* __ASM_ARCH_TIMEX_H */ +diff --git a/arch/arm/mach-s3c64xx/include/mach/timex.h b/arch/arm/mach-s3c64xx/include/mach/timex.h +deleted file mode 100644 +index fb2e8cd..0000000 +--- a/arch/arm/mach-s3c64xx/include/mach/timex.h ++++ /dev/null +@@ -1,24 +0,0 @@ +-/* arch/arm/mach-s3c64xx/include/mach/timex.h +- * +- * Copyright (c) 2003-2005 Simtec Electronics +- * Ben Dooks +- * +- * S3C6400 - time parameters +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +-*/ +- +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H +- +-/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it +- * a variable is useless. It seems as long as we make our timers an +- * exact multiple of HZ, any value that makes a 1->1 correspondence +- * for the time conversion functions to/from jiffies is acceptable. +-*/ +- +-#define CLOCK_TICK_RATE 12000000 +- +-#endif /* __ASM_ARCH_TIMEX_H */ +diff --git a/arch/arm/mach-s5p64x0/include/mach/timex.h b/arch/arm/mach-s5p64x0/include/mach/timex.h +deleted file mode 100644 +index 4b91faa..0000000 +--- a/arch/arm/mach-s5p64x0/include/mach/timex.h ++++ /dev/null +@@ -1,27 +0,0 @@ +-/* linux/arch/arm/mach-s5p64x0/include/mach/timex.h +- * +- * Copyright (c) 2010 Samsung Electronics Co., Ltd. +- * http://www.samsung.com +- * +- * Copyright (c) 2003-2005 Simtec Electronics +- * Ben Dooks +- * +- * S5P64X0 - time parameters +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +-*/ +- +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H +- +-/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it +- * a variable is useless. It seems as long as we make our timers an +- * exact multiple of HZ, any value that makes a 1->1 correspondence +- * for the time conversion functions to/from jiffies is acceptable. +-*/ +- +-#define CLOCK_TICK_RATE 12000000 +- +-#endif /* __ASM_ARCH_TIMEX_H */ +diff --git a/arch/arm/mach-s5pc100/include/mach/timex.h b/arch/arm/mach-s5pc100/include/mach/timex.h +deleted file mode 100644 +index 47ffb17..0000000 +--- a/arch/arm/mach-s5pc100/include/mach/timex.h ++++ /dev/null +@@ -1,24 +0,0 @@ +-/* arch/arm/mach-s5pc100/include/mach/timex.h +- * +- * Copyright (c) 2003-2005 Simtec Electronics +- * Ben Dooks +- * +- * S3C6400 - time parameters +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +-*/ +- +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H +- +-/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it +- * a variable is useless. It seems as long as we make our timers an +- * exact multiple of HZ, any value that makes a 1->1 correspondence +- * for the time conversion functions to/from jiffies is acceptable. +-*/ +- +-#define CLOCK_TICK_RATE 12000000 +- +-#endif /* __ASM_ARCH_TIMEX_H */ +diff --git a/arch/arm/mach-s5pv210/include/mach/timex.h b/arch/arm/mach-s5pv210/include/mach/timex.h +deleted file mode 100644 +index 73dc854..0000000 +--- a/arch/arm/mach-s5pv210/include/mach/timex.h ++++ /dev/null +@@ -1,29 +0,0 @@ +-/* linux/arch/arm/mach-s5pv210/include/mach/timex.h +- * +- * Copyright (c) 2003-2010 Simtec Electronics +- * Ben Dooks +- * +- * Copyright (c) 2010 Samsung Electronics Co., Ltd. +- * http://www.samsung.com/ +- * +- * Based on arch/arm/mach-s5p6442/include/mach/timex.h +- * +- * S5PV210 - time parameters +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +-*/ +- +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H __FILE__ +- +-/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it +- * a variable is useless. It seems as long as we make our timers an +- * exact multiple of HZ, any value that makes a 1->1 correspondence +- * for the time conversion functions to/from jiffies is acceptable. +-*/ +- +-#define CLOCK_TICK_RATE 12000000 +- +-#endif /* __ASM_ARCH_TIMEX_H */ +diff --git a/arch/arm/mach-shark/include/mach/timex.h b/arch/arm/mach-shark/include/mach/timex.h +deleted file mode 100644 +index bb6eeae..0000000 +--- a/arch/arm/mach-shark/include/mach/timex.h ++++ /dev/null +@@ -1,7 +0,0 @@ +-/* +- * arch/arm/mach-shark/include/mach/timex.h +- * +- * by Alexander Schulz +- */ +- +-#define CLOCK_TICK_RATE 1193180 +diff --git a/arch/arm/mach-shmobile/include/mach/timex.h b/arch/arm/mach-shmobile/include/mach/timex.h +deleted file mode 100644 +index ae0d8d8..0000000 +--- a/arch/arm/mach-shmobile/include/mach/timex.h ++++ /dev/null +@@ -1,6 +0,0 @@ +-#ifndef __ASM_MACH_TIMEX_H +-#define __ASM_MACH_TIMEX_H +- +-#define CLOCK_TICK_RATE 1193180 /* unused i8253 PIT value */ +- +-#endif /* __ASM_MACH_TIMEX_H */ +diff --git a/arch/arm/mach-spear/include/mach/timex.h b/arch/arm/mach-spear/include/mach/timex.h +deleted file mode 100644 +index ef95e5b..0000000 +--- a/arch/arm/mach-spear/include/mach/timex.h ++++ /dev/null +@@ -1,19 +0,0 @@ +-/* +- * arch/arm/plat-spear/include/plat/timex.h +- * +- * SPEAr platform specific timex definitions +- * +- * Copyright (C) 2009 ST Microelectronics +- * Viresh Kumar +- * +- * This file is licensed under the terms of the GNU General Public +- * License version 2. This program is licensed "as is" without any +- * warranty of any kind, whether express or implied. +- */ +- +-#ifndef __PLAT_TIMEX_H +-#define __PLAT_TIMEX_H +- +-#define CLOCK_TICK_RATE 48000000 +- +-#endif /* __PLAT_TIMEX_H */ +diff --git a/arch/arm/mach-versatile/include/mach/timex.h b/arch/arm/mach-versatile/include/mach/timex.h +deleted file mode 100644 +index 426199b..0000000 +--- a/arch/arm/mach-versatile/include/mach/timex.h ++++ /dev/null +@@ -1,23 +0,0 @@ +-/* +- * arch/arm/mach-versatile/include/mach/timex.h +- * +- * Versatile architecture timex specifications +- * +- * Copyright (C) 2003 ARM Limited +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License +- * along with this program; if not, write to the Free Software +- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +- */ +- +-#define CLOCK_TICK_RATE (50000000 / 16) +diff --git a/arch/arm/mach-w90x900/include/mach/timex.h b/arch/arm/mach-w90x900/include/mach/timex.h +deleted file mode 100644 +index 164dce0..0000000 +--- a/arch/arm/mach-w90x900/include/mach/timex.h ++++ /dev/null +@@ -1,25 +0,0 @@ +-/* +- * arch/arm/mach-w90x900/include/mach/timex.h +- * +- * Copyright (c) 2008 Nuvoton technology corporation +- * All rights reserved. +- * +- * Wan ZongShun +- * +- * Based on arch/arm/mach-s3c2410/include/mach/timex.h +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- */ +- +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H +- +-/* CLOCK_TICK_RATE Now, I don't use it. */ +- +-#define CLOCK_TICK_RATE 15000000 +- +-#endif /* __ASM_ARCH_TIMEX_H */ +diff --git a/arch/arm/plat-omap/include/plat/timex.h b/arch/arm/plat-omap/include/plat/timex.h +deleted file mode 100644 +index e27d2da..0000000 +--- a/arch/arm/plat-omap/include/plat/timex.h ++++ /dev/null +@@ -1,33 +0,0 @@ +-/* +- * arch/arm/plat-omap/include/mach/timex.h +- * +- * Copyright (C) 2000 RidgeRun, Inc. +- * Author: Greg Lonnon +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License as published by the +- * Free Software Foundation; either version 2 of the License, or (at your +- * option) any later version. +- * +- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED +- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN +- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF +- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +- * +- * You should have received a copy of the GNU General Public License along +- * with this program; if not, write to the Free Software Foundation, Inc., +- * 675 Mass Ave, Cambridge, MA 02139, USA. +- */ +- +-#if !defined(__ASM_ARCH_OMAP_TIMEX_H) +-#define __ASM_ARCH_OMAP_TIMEX_H +- +-#define CLOCK_TICK_RATE (HZ * 100000UL) +- +-#endif /* __ASM_ARCH_OMAP_TIMEX_H */ diff --git a/patches/linux-3.12-rc4/0003-ARM-make-mach-xyz-Makefile.boot-optional-for-ARCH_MU.patch b/patches/linux-3.12-rc4/0003-ARM-make-mach-xyz-Makefile.boot-optional-for-ARCH_MU.patch new file mode 100644 index 0000000..7112f22 --- /dev/null +++ b/patches/linux-3.12-rc4/0003-ARM-make-mach-xyz-Makefile.boot-optional-for-ARCH_MU.patch @@ -0,0 +1,63 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 21 Oct 2013 18:16:59 +0200 +Subject: [PATCH] ARM: make mach-xyz/Makefile.boot optional for + !ARCH_MULTIPLATFORM +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Makefile.boot is supposed to define zreladdr-y, params_phys-y and +initrd_phys-y. The first one is only needed in the absence of AUTO_ZRELADDR +and when building a zImage. The latters are only needed for bootp stuff. +So ignore errors on including Makefile.boot and error out in the targets +that need the corresponding settings. + +This makes it unnecessary to create dummy Makefile.boot files. + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/boot/Makefile | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile +index 84aa2ca..44203b3 100644 +--- a/arch/arm/boot/Makefile ++++ b/arch/arm/boot/Makefile +@@ -12,7 +12,7 @@ + # + + ifneq ($(MACHINE),) +-include $(srctree)/$(MACHINE)/Makefile.boot ++sinclude $(srctree)/$(MACHINE)/Makefile.boot + endif + + # Note: the following conditions must always be true: +@@ -51,10 +51,19 @@ $(obj)/Image: vmlinux FORCE + $(obj)/compressed/vmlinux: $(obj)/Image FORCE + $(Q)$(MAKE) $(build)=$(obj)/compressed $@ + ++ifneq ($(CONFIG_AUTO_ZRELADDR)$(ZRELADDR),) ++ + $(obj)/zImage: $(obj)/compressed/vmlinux FORCE + $(call if_changed,objcopy) + @$(kecho) ' Kernel: $@ is ready' + ++else ++ ++$(obj)/zImage: FORCE ++ @echo 'Either enable CONFIG_AUTO_ZRELADDR or provide zreladdr-y in Makefile.boot' ++ @false ++ ++endif + endif + + ifneq ($(LOADADDR),) +@@ -81,6 +90,8 @@ $(obj)/uImage: $(obj)/zImage FORCE + @$(kecho) ' Image $@ is ready' + + $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE ++ @test -n "$(PARAMS_PHYS)" || \ ++ (echo This machine does not support BOOTP; exit -1) + $(Q)$(MAKE) $(build)=$(obj)/bootp $@ + @: + diff --git a/patches/linux-3.12-rc4/0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch b/patches/linux-3.12-rc4/0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch new file mode 100644 index 0000000..762a3c1 --- /dev/null +++ b/patches/linux-3.12-rc4/0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch @@ -0,0 +1,209 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Thu, 17 Nov 2011 14:36:23 +0100 +Subject: [PATCH] ARM: new platform for Energy Micro's EFM32 Cortex-M3 SoCs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There are still some missing parts (e.g. board support, device trees), +but with these bits added on top of this patch I can successfully boot a +EFM32GG-DK3750 board that uses an EFM32GG990F1024. + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/Kconfig | 20 +++++++- + arch/arm/Makefile | 1 + + arch/arm/configs/efm32_defconfig | 102 +++++++++++++++++++++++++++++++++++++++ + arch/arm/mach-efm32/Makefile | 1 + + arch/arm/mach-efm32/dtmachine.c | 15 ++++++ + 5 files changed, 138 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/configs/efm32_defconfig + create mode 100644 arch/arm/mach-efm32/Makefile + create mode 100644 arch/arm/mach-efm32/dtmachine.c + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index f480753..23029da 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -413,6 +413,24 @@ config ARCH_EBSA110 + Ethernet interface, two PCMCIA sockets, two serial ports and a + parallel port. + ++config ARCH_EFM32 ++ bool "Energy Micro efm32" ++ depends on !MMU ++ select ARCH_REQUIRE_GPIOLIB ++ select ARM_NVIC ++ select CLKSRC_MMIO ++ select CLKSRC_OF ++ select COMMON_CLK ++ select CPU_V7M ++ select GENERIC_CLOCKEVENTS ++ select NO_DMA ++ select NO_IOPORT ++ select SPARSE_IRQ ++ select USE_OF ++ help ++ Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko ++ processors. ++ + config ARCH_EP93XX + bool "EP93xx-based" + select ARCH_HAS_HOLES_MEMORYMODEL +@@ -1818,7 +1836,7 @@ config FORCE_MAX_ZONEORDER + int "Maximum zone order" if ARCH_SHMOBILE + range 11 64 if ARCH_SHMOBILE + default "12" if SOC_AM33XX +- default "9" if SA1111 ++ default "9" if SA1111 || ARCH_EFM32 + default "11" + help + The kernel memory allocator divides physically contiguous memory +diff --git a/arch/arm/Makefile b/arch/arm/Makefile +index a37a50f..bee8be4 100644 +--- a/arch/arm/Makefile ++++ b/arch/arm/Makefile +@@ -152,6 +152,7 @@ machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx + machine-$(CONFIG_ARCH_DAVINCI) += davinci + machine-$(CONFIG_ARCH_DOVE) += dove + machine-$(CONFIG_ARCH_EBSA110) += ebsa110 ++machine-$(CONFIG_ARCH_EFM32) += efm32 + machine-$(CONFIG_ARCH_EP93XX) += ep93xx + machine-$(CONFIG_ARCH_EXYNOS) += exynos + machine-$(CONFIG_ARCH_GEMINI) += gemini +diff --git a/arch/arm/configs/efm32_defconfig b/arch/arm/configs/efm32_defconfig +new file mode 100644 +index 0000000..f59fffb +--- /dev/null ++++ b/arch/arm/configs/efm32_defconfig +@@ -0,0 +1,102 @@ ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_LOG_BUF_SHIFT=12 ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++# CONFIG_UID16 is not set ++# CONFIG_BASE_FULL is not set ++# CONFIG_FUTEX is not set ++# CONFIG_EPOLL is not set ++# CONFIG_SIGNALFD is not set ++# CONFIG_EVENTFD is not set ++# CONFIG_AIO is not set ++CONFIG_EMBEDDED=y ++# CONFIG_VM_EVENT_COUNTERS is not set ++# CONFIG_SLUB_DEBUG is not set ++# CONFIG_LBDAF is not set ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_IOSCHED_DEADLINE is not set ++# CONFIG_IOSCHED_CFQ is not set ++# CONFIG_MMU is not set ++CONFIG_ARCH_EFM32=y ++# CONFIG_KUSER_HELPERS is not set ++CONFIG_SET_MEM_PARAM=y ++CONFIG_DRAM_BASE=0x88000000 ++CONFIG_DRAM_SIZE=0x00400000 ++CONFIG_FLASH_MEM_BASE=0x8c000000 ++CONFIG_FLASH_SIZE=0x01000000 ++CONFIG_PREEMPT=y ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_XIP_KERNEL=y ++CONFIG_XIP_PHYS_ADDR=0x8c000000 ++CONFIG_BINFMT_FLAT=y ++CONFIG_BINFMT_SHARED_FLAT=y ++# CONFIG_COREDUMP is not set ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_INET=y ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_WIRELESS is not set ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++# CONFIG_FW_LOADER is not set ++CONFIG_MTD=y ++CONFIG_MTD_BLOCK_RO=y ++CONFIG_MTD_ROM=y ++CONFIG_MTD_UCLINUX=y ++CONFIG_PROC_DEVICETREE=y ++# CONFIG_BLK_DEV is not set ++CONFIG_NETDEVICES=y ++# CONFIG_NET_VENDOR_ARC is not set ++# CONFIG_NET_CADENCE is not set ++# CONFIG_NET_VENDOR_BROADCOM is not set ++# CONFIG_NET_VENDOR_CIRRUS is not set ++# CONFIG_NET_VENDOR_FARADAY is not set ++# CONFIG_NET_VENDOR_INTEL is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++CONFIG_KS8851=y ++# CONFIG_NET_VENDOR_MICROCHIP is not set ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++# CONFIG_NET_VENDOR_SMSC is not set ++# CONFIG_NET_VENDOR_STMICRO is not set ++# CONFIG_NET_VENDOR_VIA is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++# CONFIG_WLAN is not set ++# CONFIG_INPUT is not set ++# CONFIG_SERIO is not set ++# CONFIG_VT is not set ++# CONFIG_UNIX98_PTYS is not set ++# CONFIG_LEGACY_PTYS is not set ++CONFIG_SERIAL_NONSTANDARD=y ++# CONFIG_DEVKMEM is not set ++CONFIG_SERIAL_EFM32_UART=y ++CONFIG_SERIAL_EFM32_UART_CONSOLE=y ++# CONFIG_HW_RANDOM is not set ++CONFIG_SPI=y ++CONFIG_SPI_EFM32=y ++CONFIG_GPIO_SYSFS=y ++# CONFIG_USB_SUPPORT is not set ++CONFIG_MMC=y ++CONFIG_MMC_SPI=y ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_EXT2_FS=y ++# CONFIG_FILE_LOCKING is not set ++# CONFIG_DNOTIFY is not set ++# CONFIG_INOTIFY_USER is not set ++CONFIG_ROMFS_FS=y ++CONFIG_ROMFS_BACKED_BY_MTD=y ++# CONFIG_NETWORK_FILESYSTEMS is not set ++CONFIG_PRINTK_TIME=y ++CONFIG_DEBUG_INFO=y ++# CONFIG_ENABLE_WARN_DEPRECATED is not set ++# CONFIG_ENABLE_MUST_CHECK is not set ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_SCHED_DEBUG is not set ++# CONFIG_DEBUG_BUGVERBOSE is not set ++# CONFIG_FTRACE is not set +diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile +new file mode 100644 +index 0000000..3a74af7 +--- /dev/null ++++ b/arch/arm/mach-efm32/Makefile +@@ -0,0 +1 @@ ++obj-y += dtmachine.o +diff --git a/arch/arm/mach-efm32/dtmachine.c b/arch/arm/mach-efm32/dtmachine.c +new file mode 100644 +index 0000000..2367495 +--- /dev/null ++++ b/arch/arm/mach-efm32/dtmachine.c +@@ -0,0 +1,15 @@ ++#include ++ ++#include ++ ++#include ++ ++static const char *const efm32gg_compat[] __initconst = { ++ "efm32,dk3750", ++ NULL ++}; ++ ++DT_MACHINE_START(EFM32DT, "EFM32 (Device Tree Support)") ++ .dt_compat = efm32gg_compat, ++ .restart = armv7m_restart, ++MACHINE_END diff --git a/patches/linux-3.12-rc4/0005-ARM-call-of_clk_init-from-default-time_init-handler.patch b/patches/linux-3.12-rc4/0005-ARM-call-of_clk_init-from-default-time_init-handler.patch new file mode 100644 index 0000000..a02a493 --- /dev/null +++ b/patches/linux-3.12-rc4/0005-ARM-call-of_clk_init-from-default-time_init-handler.patch @@ -0,0 +1,75 @@ +From: Sebastian Hesselbarth +Date: Mon, 23 Sep 2013 09:54:30 +0200 +Subject: [PATCH] ARM: call of_clk_init from default time_init handler + +Most DT ARM machs require common clock providers initialized before timers. +Currently, arch/arm machs use .init_time to call of_clk_init right before +clocksource_of_init. This prevents to remove that callback and use the default +one instead. + +This patch adds a call to of_clk_init() to the default .init_time callback +for COMMON_CLK enabled machs to allow to remove custom callbacks where applicable. +While at it, also reorder includes alphabetically. + +Signed-off-by: Sebastian Hesselbarth +Origin: id:1379922870-2325-1-git-send-email-sebastian.hesselbarth@gmail.com (v2) +--- + arch/arm/kernel/time.c | 29 +++++++++++++++++------------ + 1 file changed, 17 insertions(+), 12 deletions(-) + +diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c +index 98aee32..829a96d 100644 +--- a/arch/arm/kernel/time.c ++++ b/arch/arm/kernel/time.c +@@ -11,25 +11,26 @@ + * This file contains the ARM-specific time handling details: + * reading the RTC at bootup, etc... + */ ++#include ++#include ++#include + #include +-#include +-#include +-#include + #include ++#include ++#include ++#include ++#include + #include ++#include + #include ++#include + #include +-#include +-#include + #include +-#include +-#include +-#include + +-#include +-#include + #include + #include ++#include ++#include + + #if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) || \ + defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE) +@@ -116,8 +117,12 @@ int __init register_persistent_clock(clock_access_fn read_boot, + + void __init time_init(void) + { +- if (machine_desc->init_time) ++ if (machine_desc->init_time) { + machine_desc->init_time(); +- else ++ } else { ++#ifdef CONFIG_COMMON_CLK ++ of_clk_init(NULL); ++#endif + clocksource_of_init(); ++ } + } diff --git a/patches/linux-3.12-rc4/0006-ARM-DEBUG_LL-on-efm32-SoCs.patch b/patches/linux-3.12-rc4/0006-ARM-DEBUG_LL-on-efm32-SoCs.patch new file mode 100644 index 0000000..142cb90 --- /dev/null +++ b/patches/linux-3.12-rc4/0006-ARM-DEBUG_LL-on-efm32-SoCs.patch @@ -0,0 +1,116 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Tue, 24 Sep 2013 15:52:44 +0200 +Subject: [PATCH] ARM: DEBUG_LL on efm32 SoCs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This implements output of debug messages on efm32 SoCs. + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/Kconfig.debug | 17 ++++++++++++++++ + arch/arm/include/debug/efm32.S | 45 ++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 62 insertions(+) + create mode 100644 arch/arm/include/debug/efm32.S + +diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug +index 9762c84..2b32068 100644 +--- a/arch/arm/Kconfig.debug ++++ b/arch/arm/Kconfig.debug +@@ -834,6 +834,20 @@ choice + options; the platform specific options are deprecated + and will be soon removed. + ++ config DEBUG_LL_UART_EFM32 ++ bool "Kernel low-level debugging via efm32 UART" ++ depends on ARCH_EFM32 ++ help ++ Say Y here if you want the debug print routines to direct ++ their output to an UART or USART port on efm32 based ++ machines. Use the following addresses for DEBUG_UART_PHYS: ++ ++ 0x4000c000 | USART0 ++ 0x4000c400 | USART1 ++ 0x4000c800 | USART2 ++ 0x4000e000 | UART0 ++ 0x4000e400 | UART1 ++ + config DEBUG_LL_UART_PL01X + bool "Kernel low-level debugging via ARM Ltd PL01x Primecell UART" + help +@@ -885,6 +899,7 @@ config DEBUG_LL_INCLUDE + default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default "debug/pl01x.S" if DEBUG_LL_UART_PL01X || DEBUG_UART_PL01X + default "debug/exynos.S" if DEBUG_EXYNOS_UART ++ default "debug/efm32.S" if DEBUG_LL_UART_EFM32 + default "debug/icedcc.S" if DEBUG_ICEDCC + default "debug/imx.S" if DEBUG_IMX1_UART || \ + DEBUG_IMX25_UART || \ +@@ -951,6 +966,7 @@ config DEBUG_UART_PHYS + default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 + default 0x20068000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 + default 0x20201000 if DEBUG_BCM2835 ++ default 0x4000e400 if DEBUG_LL_UART_EFM32 + default 0x40090000 if ARCH_LPC32XX + default 0x40100000 if DEBUG_PXA_UART1 + default 0x42000000 if ARCH_GEMINI +@@ -981,6 +997,7 @@ config DEBUG_UART_PHYS + default 0xfff36000 if DEBUG_HIGHBANK_UART + default 0xfffff700 if ARCH_IOP33X + depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ ++ DEBUG_LL_UART_EFM32 || \ + DEBUG_UART_8250 || DEBUG_UART_PL01X + + config DEBUG_UART_VIRT +diff --git a/arch/arm/include/debug/efm32.S b/arch/arm/include/debug/efm32.S +new file mode 100644 +index 0000000..2265a19 +--- /dev/null ++++ b/arch/arm/include/debug/efm32.S +@@ -0,0 +1,45 @@ ++/* ++ * Copyright (C) 2013 Pengutronix ++ * Uwe Kleine-Koenig ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#define UARTn_CMD 0x000c ++#define UARTn_CMD_TXEN 0x0004 ++ ++#define UARTn_STATUS 0x0010 ++#define UARTn_STATUS_TXC 0x0020 ++#define UARTn_STATUS_TXBL 0x0040 ++ ++#define UARTn_TXDATA 0x0034 ++ ++ .macro addruart, rx, tmp ++ ldr \rx, =(CONFIG_DEBUG_UART_PHYS) ++ ++ /* ++ * enable TX. The driver might disable it to save energy. We ++ * don't care about disabling at the end as during debug power ++ * consumption isn't that important. ++ */ ++ ldr \tmp, =(UARTn_CMD_TXEN) ++ str \tmp, [\rx, #UARTn_CMD] ++ .endm ++ ++ .macro senduart,rd,rx ++ strb \rd, [\rx, #UARTn_TXDATA] ++ .endm ++ ++ .macro waituart,rd,rx ++1001: ldr \rd, [\rx, #UARTn_STATUS] ++ tst \rd, #UARTn_STATUS_TXBL ++ beq 1001b ++ .endm ++ ++ .macro busyuart,rd,rx ++1001: ldr \rd, [\rx, UARTn_STATUS] ++ tst \rd, #UARTn_STATUS_TXC ++ bne 1001b ++ .endm diff --git a/patches/linux-3.12-rc4/0007-spi-efm32-drop-unused-struct-and-fix-size-check.patch b/patches/linux-3.12-rc4/0007-spi-efm32-drop-unused-struct-and-fix-size-check.patch new file mode 100644 index 0000000..7a0cc07 --- /dev/null +++ b/patches/linux-3.12-rc4/0007-spi-efm32-drop-unused-struct-and-fix-size-check.patch @@ -0,0 +1,40 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Tue, 8 Oct 2013 09:47:09 +0200 +Subject: [PATCH] spi: efm32: drop unused struct and fix size check +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The variable efm32_spi_pdata_default origins from an earlier revision of +the patch introducing the driver, its use was dropped because of review +comments but I forgot to also drop the variable itself. + +Signed-off-by: Uwe Kleine-König +--- + drivers/spi/spi-efm32.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +diff --git a/drivers/spi/spi-efm32.c b/drivers/spi/spi-efm32.c +index 7d84418..7b64693 100644 +--- a/drivers/spi/spi-efm32.c ++++ b/drivers/spi/spi-efm32.c +@@ -280,10 +280,6 @@ static irqreturn_t efm32_spi_txirq(int irq, void *data) + return IRQ_HANDLED; + } + +-static const struct efm32_spi_pdata efm32_spi_pdata_default = { +- .location = 1, +-}; +- + static u32 efm32_spi_get_configured_location(struct efm32_spi_ddata *ddata) + { + u32 reg = efm32_spi_read32(ddata, REG_ROUTE); +@@ -387,7 +383,7 @@ static int efm32_spi_probe(struct platform_device *pdev) + goto err; + } + +- if (resource_size(res) < 60) { ++ if (resource_size(res) < 0x60) { + ret = -EINVAL; + dev_err(&pdev->dev, "memory resource too small\n"); + goto err; diff --git a/patches/linux-3.12-rc4/0008-ARM-drop-ARCH_MULTIPLATFORM-dependency-of-XIP_KERNEL.patch b/patches/linux-3.12-rc4/0008-ARM-drop-ARCH_MULTIPLATFORM-dependency-of-XIP_KERNEL.patch new file mode 100644 index 0000000..8461305 --- /dev/null +++ b/patches/linux-3.12-rc4/0008-ARM-drop-ARCH_MULTIPLATFORM-dependency-of-XIP_KERNEL.patch @@ -0,0 +1,39 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 30 Sep 2013 11:05:35 +0200 +Subject: [PATCH] ARM: drop !ARCH_MULTIPLATFORM dependency of XIP_KERNEL +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Enabling XIP_KERNEL requires specifying the physical address of the readonly +memory. As these addresses vary among different SoCs and even machines with +the same SoC enabling XIP_KERNEL might restrict the set of machines that can +run the resulting kernel to a subset of the configured in machines. + +Still allowing XIP_KERNEL for a MULTIPLATFORM kernel makes sense as for some +platforms MULTIPLATFORM is mandatory (e.g. bcm, highbank or imx). So to +allow compiling a XIP kernel for these platforms, allow selecting XIP in the +presence of ARCH_MULTIPLATFORM. + +Signed-off-by: Uwe Kleine-König +--- +This patch might be problematic for compile coverage testing according to +Arnd. Still I need XIP for my efm32 machine as it only features 4 MiB of +RAM. +--- + arch/arm/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 23029da..efdd6ef 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -2099,7 +2099,7 @@ endchoice + + config XIP_KERNEL + bool "Kernel Execute-In-Place from ROM" +- depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM ++ depends on !ZBOOT_ROM && !ARM_LPAE + help + Execute-In-Place allows the kernel to run from non-volatile storage + directly addressable by the CPU, such as NOR flash. This saves RAM diff --git a/patches/linux-3.12-rc4/0009-ARM-allow-MULTIPLATFORM-on-no-MMU-machines.patch b/patches/linux-3.12-rc4/0009-ARM-allow-MULTIPLATFORM-on-no-MMU-machines.patch new file mode 100644 index 0000000..064332b --- /dev/null +++ b/patches/linux-3.12-rc4/0009-ARM-allow-MULTIPLATFORM-on-no-MMU-machines.patch @@ -0,0 +1,30 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 30 Sep 2013 11:11:58 +0200 +Subject: [PATCH] ARM: allow MULTIPLATFORM on no-MMU machines +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There is no technical reason to not use the benefits of MULTIPLATFORM on a +no-MMU machine and my not-yet-mainline efm32 port does work just fine with +it. So drop the dependency. + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/Kconfig | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index efdd6ef..314e396 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -302,8 +302,7 @@ choice + + config ARCH_MULTIPLATFORM + bool "Allow multiple platforms to be selected" +- depends on MMU +- select ARM_PATCH_PHYS_VIRT ++ select ARM_PATCH_PHYS_VIRT if MMU && !XIP_KERNEL + select AUTO_ZRELADDR + select COMMON_CLK + select MULTI_IRQ_HANDLER diff --git a/patches/linux-3.12-rc4/0010-RFC-ARM-prepare-ARMv7-M-for-MULTIPLATFORM-use.patch b/patches/linux-3.12-rc4/0010-RFC-ARM-prepare-ARMv7-M-for-MULTIPLATFORM-use.patch new file mode 100644 index 0000000..c90155e --- /dev/null +++ b/patches/linux-3.12-rc4/0010-RFC-ARM-prepare-ARMv7-M-for-MULTIPLATFORM-use.patch @@ -0,0 +1,70 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 30 Sep 2013 11:25:15 +0200 +Subject: [PATCH] [RFC] ARM: prepare ARMv7-M for MULTIPLATFORM use +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +v7-M is a third group that is incompatible with both v4/v5 and v6/v7. + +Signed-off-by: Uwe Kleine-König +--- +This behaves strange but I think is robust not to allow broken configs: + +When v4/v5 is selected, v6/v7 and v7m are available for enabling, too. +When v6/v7 is selected the other choices are disabled +When v7m is selected only v6/v7 are available for enabling. +--- + arch/arm/Kconfig | 11 ++++++++--- + arch/arm/kernel/entry-v7m.S | 4 ++++ + 2 files changed, 12 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 314e396..cc24241 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -914,7 +914,7 @@ comment "CPU Core family selection" + + config ARCH_MULTI_V4T + bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" +- depends on !ARCH_MULTI_V6_V7 ++ depends on !ARCH_MULTI_V6_V7 && !ARCH_MULTI_V7M + select ARCH_MULTI_V4_V5 + select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \ + CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \ +@@ -922,7 +922,7 @@ config ARCH_MULTI_V4T + + config ARCH_MULTI_V5 + bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)" +- depends on !ARCH_MULTI_V6_V7 ++ depends on !ARCH_MULTI_V6_V7 && !ARCH_MULTI_V7M + select ARCH_MULTI_V4_V5 + select CPU_ARM926T if (!CPU_ARM946E || CPU_ARM1020 || \ + CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \ +@@ -945,8 +945,13 @@ config ARCH_MULTI_V7 + config ARCH_MULTI_V6_V7 + bool + ++config ARCH_MULTI_V7M ++ bool "ARMv7-M based platforms (Cortex-M)" ++ depends on !ARCH_MULTI_V6_V7 && !MMU ++ select CPU_V7M ++ + config ARCH_MULTI_CPU_AUTO +- def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7) ++ def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7 || ARCH_MULTI_V7M) + select ARCH_MULTI_V5 + + endmenu +diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S +index 2260f18..f72ced6 100644 +--- a/arch/arm/kernel/entry-v7m.S ++++ b/arch/arm/kernel/entry-v7m.S +@@ -139,3 +139,7 @@ ENTRY(vector_table) + .rept 64 - 16 + .long __irq_entry @ 16..64 - External Interrupts + .endr ++ ++ .globl handle_arch_irq ++handle_arch_irq: ++ .long 0 diff --git a/patches/linux-3.12-rc4/0011-clocksource-Provide-timekeeping-for-efm32-SoCs.patch b/patches/linux-3.12-rc4/0011-clocksource-Provide-timekeeping-for-efm32-SoCs.patch new file mode 100644 index 0000000..49a9d7e --- /dev/null +++ b/patches/linux-3.12-rc4/0011-clocksource-Provide-timekeeping-for-efm32-SoCs.patch @@ -0,0 +1,362 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Sat, 7 Sep 2013 23:56:50 +0200 +Subject: [PATCH] clocksource: Provide timekeeping for efm32 SoCs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver +provides clocksource and clock event device using one timer instance +each. + +Signed-off-by: Uwe Kleine-König +--- + .../devicetree/bindings/timer/efm32,timer.txt | 23 ++ + drivers/clocksource/Kconfig | 8 + + drivers/clocksource/Makefile | 1 + + drivers/clocksource/time-efm32.c | 275 +++++++++++++++++++++ + 4 files changed, 307 insertions(+) + create mode 100644 Documentation/devicetree/bindings/timer/efm32,timer.txt + create mode 100644 drivers/clocksource/time-efm32.c + +diff --git a/Documentation/devicetree/bindings/timer/efm32,timer.txt b/Documentation/devicetree/bindings/timer/efm32,timer.txt +new file mode 100644 +index 0000000..97a568f +--- /dev/null ++++ b/Documentation/devicetree/bindings/timer/efm32,timer.txt +@@ -0,0 +1,23 @@ ++* EFM32 timer hardware ++ ++The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be ++connected to form a 32 bit counter. Each timer has three Compare/Capture ++channels and can be used as PWM or Quadrature Decoder. Available clock sources ++are the cpu's HFPERCLK (with a 10-bit prescaler) or an external pin. ++ ++Required properties: ++- compatible : Should be efm32,timer ++- reg : Address and length of the register set ++- clocks : Should contain a reference to the HFPERCLK ++ ++Optional properties: ++- interrupts : Reference to the timer interrupt ++ ++Example: ++ ++timer@40010c00 { ++ compatible = "efm32,timer"; ++ reg = <0x40010c00 0x400>; ++ interrupts = <14>; ++ clocks = <&cmu clk_HFPERCLKTIMER3>; ++}; +diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig +index 971d796..e634016 100644 +--- a/drivers/clocksource/Kconfig ++++ b/drivers/clocksource/Kconfig +@@ -71,6 +71,14 @@ config CLKSRC_DBX500_PRCMU_SCHED_CLOCK + help + Use the always on PRCMU Timer as sched_clock + ++config CLKSRC_EFM32 ++ bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32 ++ depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) ++ default ARCH_EFM32 ++ help ++ Support to use the timers of EFM32 SoCs as clock source and clock ++ event device. ++ + config ARM_ARCH_TIMER + bool + select CLKSRC_OF if OF +diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile +index 704d6d3..33621ef 100644 +--- a/drivers/clocksource/Makefile ++++ b/drivers/clocksource/Makefile +@@ -27,6 +27,7 @@ obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o + obj-$(CONFIG_ARCH_NSPIRE) += zevio-timer.o + obj-$(CONFIG_ARCH_BCM) += bcm_kona_timer.o + obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence_ttc_timer.o ++obj-$(CONFIG_CLKSRC_EFM32) += time-efm32.o + obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o + obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o + obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o +diff --git a/drivers/clocksource/time-efm32.c b/drivers/clocksource/time-efm32.c +new file mode 100644 +index 0000000..1a6205b +--- /dev/null ++++ b/drivers/clocksource/time-efm32.c +@@ -0,0 +1,275 @@ ++/* ++ * Copyright (C) 2013 Pengutronix ++ * Uwe Kleine-Koenig ++ * ++ * This program is free software; you can redistribute it and/or modify it under ++ * the terms of the GNU General Public License version 2 as published by the ++ * Free Software Foundation. ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define TIMERn_CTRL 0x00 ++#define TIMERn_CTRL_PRESC(val) (((val) & 0xf) << 24) ++#define TIMERn_CTRL_PRESC_1024 TIMERn_CTRL_PRESC(10) ++#define TIMERn_CTRL_CLKSEL(val) (((val) & 0x3) << 16) ++#define TIMERn_CTRL_CLKSEL_PRESCHFPERCLK TIMERn_CTRL_CLKSEL(0) ++#define TIMERn_CTRL_OSMEN 0x00000010 ++#define TIMERn_CTRL_MODE(val) (((val) & 0x3) << 0) ++#define TIMERn_CTRL_MODE_UP TIMERn_CTRL_MODE(0) ++#define TIMERn_CTRL_MODE_DOWN TIMERn_CTRL_MODE(1) ++ ++#define TIMERn_CMD 0x04 ++#define TIMERn_CMD_START 0x00000001 ++#define TIMERn_CMD_STOP 0x00000002 ++ ++#define TIMERn_IEN 0x0c ++#define TIMERn_IF 0x10 ++#define TIMERn_IFS 0x14 ++#define TIMERn_IFC 0x18 ++#define TIMERn_IRQ_UF 0x00000002 ++ ++#define TIMERn_TOP 0x1c ++#define TIMERn_CNT 0x24 ++ ++struct efm32_clock_event_ddata { ++ struct clock_event_device evtdev; ++ void __iomem *base; ++ unsigned periodic_top; ++}; ++ ++static void efm32_clock_event_set_mode(enum clock_event_mode mode, ++ struct clock_event_device *evtdev) ++{ ++ struct efm32_clock_event_ddata *ddata = ++ container_of(evtdev, struct efm32_clock_event_ddata, evtdev); ++ ++ switch (mode) { ++ case CLOCK_EVT_MODE_PERIODIC: ++ writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); ++ writel_relaxed(ddata->periodic_top, ddata->base + TIMERn_TOP); ++ writel_relaxed(TIMERn_CTRL_PRESC_1024 | ++ TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | ++ TIMERn_CTRL_MODE_DOWN, ++ ddata->base + TIMERn_CTRL); ++ writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD); ++ break; ++ ++ case CLOCK_EVT_MODE_ONESHOT: ++ writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); ++ writel_relaxed(TIMERn_CTRL_PRESC_1024 | ++ TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | ++ TIMERn_CTRL_OSMEN | ++ TIMERn_CTRL_MODE_DOWN, ++ ddata->base + TIMERn_CTRL); ++ break; ++ ++ case CLOCK_EVT_MODE_UNUSED: ++ case CLOCK_EVT_MODE_SHUTDOWN: ++ writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); ++ break; ++ ++ case CLOCK_EVT_MODE_RESUME: ++ break; ++ } ++} ++ ++static int efm32_clock_event_set_next_event(unsigned long evt, ++ struct clock_event_device *evtdev) ++{ ++ struct efm32_clock_event_ddata *ddata = ++ container_of(evtdev, struct efm32_clock_event_ddata, evtdev); ++ ++ writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD); ++ writel_relaxed(evt, ddata->base + TIMERn_CNT); ++ writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD); ++ ++ return 0; ++} ++ ++static irqreturn_t efm32_clock_event_handler(int irq, void *dev_id) ++{ ++ struct efm32_clock_event_ddata *ddata = dev_id; ++ ++ writel_relaxed(TIMERn_IRQ_UF, ddata->base + TIMERn_IFC); ++ ++ ddata->evtdev.event_handler(&ddata->evtdev); ++ ++ return IRQ_HANDLED; ++} ++ ++static struct efm32_clock_event_ddata clock_event_ddata = { ++ .evtdev = { ++ .name = "efm32 clockevent", ++ .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_MODE_PERIODIC, ++ .set_mode = efm32_clock_event_set_mode, ++ .set_next_event = efm32_clock_event_set_next_event, ++ .rating = 200, ++ }, ++}; ++ ++static struct irqaction efm32_clock_event_irq = { ++ .name = "efm32 clockevent", ++ .flags = IRQF_TIMER, ++ .handler = efm32_clock_event_handler, ++ .dev_id = &clock_event_ddata, ++}; ++ ++static int __init efm32_clocksource_init(struct device_node *np) ++{ ++ struct clk *clk; ++ void __iomem *base; ++ unsigned long rate; ++ int ret; ++ ++ clk = of_clk_get(np, 0); ++ if (IS_ERR(clk)) { ++ ret = PTR_ERR(clk); ++ pr_err("failed to get clock for clocksource (%d)\n", ret); ++ goto err_clk_get; ++ } ++ ++ ret = clk_prepare_enable(clk); ++ if (ret) { ++ pr_err("failed to enable timer clock for clocksource (%d)\n", ++ ret); ++ goto err_clk_enable; ++ } ++ rate = clk_get_rate(clk); ++ ++ base = of_iomap(np, 0); ++ if (!base) { ++ ret = -EADDRNOTAVAIL; ++ pr_err("failed to map registers for clocksource\n"); ++ goto err_iomap; ++ } ++ ++ writel_relaxed(TIMERn_CTRL_PRESC_1024 | ++ TIMERn_CTRL_CLKSEL_PRESCHFPERCLK | ++ TIMERn_CTRL_MODE_UP, base + TIMERn_CTRL); ++ writel_relaxed(TIMERn_CMD_START, base + TIMERn_CMD); ++ ++ ret = clocksource_mmio_init(base + TIMERn_CNT, "efm32 timer", ++ DIV_ROUND_CLOSEST(rate, 1024), 200, 16, ++ clocksource_mmio_readl_up); ++ if (ret) { ++ pr_err("failed to init clocksource (%d)\n", ret); ++ goto err_clocksource_init; ++ } ++ ++ return 0; ++ ++err_clocksource_init: ++ ++ iounmap(base); ++err_iomap: ++ ++ clk_disable_unprepare(clk); ++err_clk_enable: ++ ++ clk_put(clk); ++err_clk_get: ++ ++ return ret; ++} ++ ++static int __init efm32_clockevent_init(struct device_node *np) ++{ ++ struct clk *clk; ++ void __iomem *base; ++ unsigned long rate; ++ int irq; ++ int ret; ++ ++ clk = of_clk_get(np, 0); ++ if (IS_ERR(clk)) { ++ ret = PTR_ERR(clk); ++ pr_err("failed to get clock for clockevent (%d)\n", ret); ++ goto err_clk_get; ++ } ++ ++ ret = clk_prepare_enable(clk); ++ if (ret) { ++ pr_err("failed to enable timer clock for clockevent (%d)\n", ++ ret); ++ goto err_clk_enable; ++ } ++ rate = clk_get_rate(clk); ++ ++ base = of_iomap(np, 0); ++ if (!base) { ++ ret = -EADDRNOTAVAIL; ++ pr_err("failed to map registers for clockevent\n"); ++ goto err_iomap; ++ } ++ ++ irq = irq_of_parse_and_map(np, 0); ++ if (!irq) { ++ ret = -ENOENT; ++ pr_err("failed to get irq for clockevent\n"); ++ goto err_get_irq; ++ } ++ ++ writel_relaxed(TIMERn_IRQ_UF, base + TIMERn_IEN); ++ ++ clock_event_ddata.base = base; ++ clock_event_ddata.periodic_top = DIV_ROUND_CLOSEST(rate, 1024 * HZ); ++ ++ setup_irq(irq, &efm32_clock_event_irq); ++ ++ clockevents_config_and_register(&clock_event_ddata.evtdev, ++ DIV_ROUND_CLOSEST(rate, 1024), ++ 0xf, 0xffff); ++ ++ return 0; ++ ++err_get_irq: ++ ++ iounmap(base); ++err_iomap: ++ ++ clk_disable_unprepare(clk); ++err_clk_enable: ++ ++ clk_put(clk); ++err_clk_get: ++ ++ return ret; ++} ++ ++/* ++ * This function asserts that we have exactly one clocksource and one ++ * clock_event_device in the end. ++ */ ++static void __init efm32_timer_init(struct device_node *np) ++{ ++ static int has_clocksource, has_clockevent; ++ int ret; ++ ++ if (!has_clocksource) { ++ ret = efm32_clocksource_init(np); ++ if (!ret) { ++ has_clocksource = 1; ++ return; ++ } ++ } ++ ++ if (!has_clockevent) { ++ ret = efm32_clockevent_init(np); ++ if (!ret) { ++ has_clockevent = 1; ++ return; ++ } ++ } ++} ++CLOCKSOURCE_OF_DECLARE(efm32, "efm32,timer", efm32_timer_init); diff --git a/patches/linux-3.12-rc4/0012-clk-new-driver-for-efm32-SoC.patch b/patches/linux-3.12-rc4/0012-clk-new-driver-for-efm32-SoC.patch new file mode 100644 index 0000000..8fef20e --- /dev/null +++ b/patches/linux-3.12-rc4/0012-clk-new-driver-for-efm32-SoC.patch @@ -0,0 +1,186 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Fri, 9 Aug 2013 11:07:49 +0200 +Subject: [PATCH] clk: new driver for efm32 SoC +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This patch adds support for the clocks provided by the Clock Management +Unit of Energy Micro's efm32 Giant Gecko SoCs including device tree +bindings. + +Signed-off-by: Uwe Kleine-König +--- + .../devicetree/bindings/clock/efm32-clock.txt | 11 +++ + drivers/clk/Makefile | 1 + + drivers/clk/clk-efm32gg.c | 81 ++++++++++++++++++++++ + include/dt-bindings/clock/efm32-cmu.h | 42 +++++++++++ + 4 files changed, 135 insertions(+) + create mode 100644 Documentation/devicetree/bindings/clock/efm32-clock.txt + create mode 100644 drivers/clk/clk-efm32gg.c + create mode 100644 include/dt-bindings/clock/efm32-cmu.h + +diff --git a/Documentation/devicetree/bindings/clock/efm32-clock.txt b/Documentation/devicetree/bindings/clock/efm32-clock.txt +new file mode 100644 +index 0000000..263d293 +--- /dev/null ++++ b/Documentation/devicetree/bindings/clock/efm32-clock.txt +@@ -0,0 +1,11 @@ ++* Clock bindings for Energy Micro efm32 Giant Gecko's Clock Management Unit ++ ++Required properties: ++- compatible: Should be "efm32gg,cmu" ++- reg: Base address and length of the register set ++- interrupts: Interrupt used by the CMU ++- #clock-cells: Should be <1> ++ ++The clock consumer should specify the desired clock by having the clock ID in ++its "clocks" phandle cell. The header efm32-clk.h contains a list of available ++IDs. +diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +index 7b11106..40c2225 100644 +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -11,6 +11,7 @@ obj-$(CONFIG_COMMON_CLK) += clk-composite.o + + # SoCs specific + obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o ++obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o + obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o + obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o + obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o +diff --git a/drivers/clk/clk-efm32gg.c b/drivers/clk/clk-efm32gg.c +new file mode 100644 +index 0000000..bac2ddf +--- /dev/null ++++ b/drivers/clk/clk-efm32gg.c +@@ -0,0 +1,81 @@ ++/* ++ * Copyright (C) 2013 Pengutronix ++ * Uwe Kleine-Koenig ++ * ++ * This program is free software; you can redistribute it and/or modify it under ++ * the terms of the GNU General Public License version 2 as published by the ++ * Free Software Foundation. ++ */ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define CMU_HFPERCLKEN0 0x44 ++ ++static struct clk *clk[37]; ++static struct clk_onecell_data clk_data = { ++ .clks = clk, ++ .clk_num = ARRAY_SIZE(clk), ++}; ++ ++static int __init efm32gg_cmu_init(struct device_node *np) ++{ ++ int i; ++ void __iomem *base; ++ ++ for (i = 0; i < ARRAY_SIZE(clk); ++i) ++ clk[i] = ERR_PTR(-ENOENT); ++ ++ base = of_iomap(np, 0); ++ if (!base) { ++ pr_warn("Failed to map address range for efm32gg,cmu node\n"); ++ return -EADDRNOTAVAIL; ++ } ++ ++ clk[clk_HFXO] = clk_register_fixed_rate(NULL, "HFXO", NULL, ++ CLK_IS_ROOT, 48000000); ++ ++ clk[clk_HFPERCLKUSART0] = clk_register_gate(NULL, "HFPERCLK.USART0", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 0, 0, NULL); ++ clk[clk_HFPERCLKUSART1] = clk_register_gate(NULL, "HFPERCLK.USART1", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 1, 0, NULL); ++ clk[clk_HFPERCLKUSART2] = clk_register_gate(NULL, "HFPERCLK.USART2", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 2, 0, NULL); ++ clk[clk_HFPERCLKUART0] = clk_register_gate(NULL, "HFPERCLK.UART0", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 3, 0, NULL); ++ clk[clk_HFPERCLKUART1] = clk_register_gate(NULL, "HFPERCLK.UART1", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 4, 0, NULL); ++ clk[clk_HFPERCLKTIMER0] = clk_register_gate(NULL, "HFPERCLK.TIMER0", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 5, 0, NULL); ++ clk[clk_HFPERCLKTIMER1] = clk_register_gate(NULL, "HFPERCLK.TIMER1", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 6, 0, NULL); ++ clk[clk_HFPERCLKTIMER2] = clk_register_gate(NULL, "HFPERCLK.TIMER2", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 7, 0, NULL); ++ clk[clk_HFPERCLKTIMER3] = clk_register_gate(NULL, "HFPERCLK.TIMER3", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 8, 0, NULL); ++ clk[clk_HFPERCLKACMP0] = clk_register_gate(NULL, "HFPERCLK.ACMP0", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 9, 0, NULL); ++ clk[clk_HFPERCLKACMP1] = clk_register_gate(NULL, "HFPERCLK.ACMP1", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 10, 0, NULL); ++ clk[clk_HFPERCLKI2C0] = clk_register_gate(NULL, "HFPERCLK.I2C0", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 11, 0, NULL); ++ clk[clk_HFPERCLKI2C1] = clk_register_gate(NULL, "HFPERCLK.I2C1", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 12, 0, NULL); ++ clk[clk_HFPERCLKGPIO] = clk_register_gate(NULL, "HFPERCLK.GPIO", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 13, 0, NULL); ++ clk[clk_HFPERCLKVCMP] = clk_register_gate(NULL, "HFPERCLK.VCMP", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 14, 0, NULL); ++ clk[clk_HFPERCLKPRS] = clk_register_gate(NULL, "HFPERCLK.PRS", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 15, 0, NULL); ++ clk[clk_HFPERCLKADC0] = clk_register_gate(NULL, "HFPERCLK.ADC0", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 16, 0, NULL); ++ clk[clk_HFPERCLKDAC0] = clk_register_gate(NULL, "HFPERCLK.DAC0", ++ "HFXO", 0, base + CMU_HFPERCLKEN0, 17, 0, NULL); ++ ++ return of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); ++} ++CLK_OF_DECLARE(efm32ggcmu, "efm32gg,cmu", efm32gg_cmu_init); +diff --git a/include/dt-bindings/clock/efm32-cmu.h b/include/dt-bindings/clock/efm32-cmu.h +new file mode 100644 +index 0000000..b21b91e +--- /dev/null ++++ b/include/dt-bindings/clock/efm32-cmu.h +@@ -0,0 +1,42 @@ ++#ifndef __DT_BINDINGS_CLOCK_EFM32_CMU_H ++#define __DT_BINDINGS_CLOCK_EFM32_CMU_H ++ ++#define clk_HFXO 0 ++#define clk_HFRCO 1 ++#define clk_LFXO 2 ++#define clk_LFRCO 3 ++#define clk_ULFRCO 4 ++#define clk_AUXHFRCO 5 ++#define clk_HFCLKNODIV 6 ++#define clk_HFCLK 7 ++#define clk_HFPERCLK 8 ++#define clk_HFCORECLK 9 ++#define clk_LFACLK 10 ++#define clk_LFBCLK 11 ++#define clk_WDOGCLK 12 ++#define clk_HFCORECLKDMA 13 ++#define clk_HFCORECLKAES 14 ++#define clk_HFCORECLKUSBC 15 ++#define clk_HFCORECLKUSB 16 ++#define clk_HFCORECLKLE 17 ++#define clk_HFCORECLKEBI 18 ++#define clk_HFPERCLKUSART0 19 ++#define clk_HFPERCLKUSART1 20 ++#define clk_HFPERCLKUSART2 21 ++#define clk_HFPERCLKUART0 22 ++#define clk_HFPERCLKUART1 23 ++#define clk_HFPERCLKTIMER0 24 ++#define clk_HFPERCLKTIMER1 25 ++#define clk_HFPERCLKTIMER2 26 ++#define clk_HFPERCLKTIMER3 27 ++#define clk_HFPERCLKACMP0 28 ++#define clk_HFPERCLKACMP1 29 ++#define clk_HFPERCLKI2C0 30 ++#define clk_HFPERCLKI2C1 31 ++#define clk_HFPERCLKGPIO 32 ++#define clk_HFPERCLKVCMP 33 ++#define clk_HFPERCLKPRS 34 ++#define clk_HFPERCLKADC0 35 ++#define clk_HFPERCLKDAC0 36 ++ ++#endif /* __DT_BINDINGS_CLOCK_EFM32_CMU_H */ diff --git a/patches/linux-3.12-rc4/0013-ARM-device-trees-for-Energy-Micro-s-EFM32-Cortex-M3-.patch b/patches/linux-3.12-rc4/0013-ARM-device-trees-for-Energy-Micro-s-EFM32-Cortex-M3-.patch new file mode 100644 index 0000000..5dd2036 --- /dev/null +++ b/patches/linux-3.12-rc4/0013-ARM-device-trees-for-Energy-Micro-s-EFM32-Cortex-M3-.patch @@ -0,0 +1,324 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Tue, 17 Sep 2013 21:08:42 +0200 +Subject: [PATCH] ARM: device trees for Energy Micro's EFM32 Cortex-M3 SoCs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/armv7-m.dtsi | 18 ++++ + arch/arm/boot/dts/efm32gg-dk3750.dts | 86 ++++++++++++++++++ + arch/arm/boot/dts/efm32gg.dtsi | 172 +++++++++++++++++++++++++++++++++++ + 4 files changed, 277 insertions(+) + create mode 100644 arch/arm/boot/dts/armv7-m.dtsi + create mode 100644 arch/arm/boot/dts/efm32gg-dk3750.dts + create mode 100644 arch/arm/boot/dts/efm32gg.dtsi + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 802720e..3f31f04 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -52,6 +52,7 @@ dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \ + dove-cubox.dtb \ + dove-d2plug.dtb \ + dove-dove-db.dtb ++dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb + dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ + exynos4210-smdkv310.dtb \ + exynos4210-trats.dtb \ +diff --git a/arch/arm/boot/dts/armv7-m.dtsi b/arch/arm/boot/dts/armv7-m.dtsi +new file mode 100644 +index 0000000..5a660d0 +--- /dev/null ++++ b/arch/arm/boot/dts/armv7-m.dtsi +@@ -0,0 +1,18 @@ ++#include "skeleton.dtsi" ++ ++/ { ++ nvic: nv-interrupt-controller { ++ compatible = "arm,armv7m-nvic"; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ reg = <0xe000e100 0xc00>; ++ }; ++ ++ soc { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "simple-bus"; ++ interrupt-parent = <&nvic>; ++ ranges; ++ }; ++}; +diff --git a/arch/arm/boot/dts/efm32gg-dk3750.dts b/arch/arm/boot/dts/efm32gg-dk3750.dts +new file mode 100644 +index 0000000..aa5c0f6 +--- /dev/null ++++ b/arch/arm/boot/dts/efm32gg-dk3750.dts +@@ -0,0 +1,86 @@ ++/* ++ * Device tree for EFM32GG-DK3750 development board. ++ * ++ * Documentation available from ++ * http://www.silabs.com/Support%20Documents/TechnicalDocs/efm32gg-dk3750-ug.pdf ++ */ ++ ++/dts-v1/; ++#include "efm32gg.dtsi" ++ ++/ { ++ model = "Energy Micro Giant Gecko Development Kit"; ++ compatible = "efm32,dk3750"; ++ ++ chosen { ++ bootargs = "console=ttyefm4,115200 init=/linuxrc ignore_loglevel ihash_entries=64 dhash_entries=64 earlyprintk uclinux.physaddr=0x8c400000 root=/dev/mtdblock0"; ++ }; ++ ++ memory { ++ reg = <0x88000000 0x400000>; ++ }; ++ ++ soc { ++ adc@40002000 { ++ status = "ok"; ++ }; ++ ++ i2c@4000a000 { ++ location = <3>; ++ status = "ok"; ++ ++ temp@48 { ++ compatible = "st,stds75"; ++ reg = <0x48>; ++ }; ++ ++ eeprom@50 { ++ compatible = "microchip,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ }; ++ ++ spi0: spi@4000c000 { /* USART0 */ ++ cs-gpios = <&gpio 68 1>; // E4 ++ location = <1>; ++ status = "ok"; ++ ++ microsd@0 { ++ compatible = "mmc-spi-slot"; ++ spi-max-frequency = <100000>; ++ voltage-ranges = <3200 3400>; ++ broken-cd; ++ reg = <0>; ++ }; ++ }; ++ ++ spi1: spi@4000c400 { /* USART1 */ ++ cs-gpios = <&gpio 51 1>; // D3 ++ location = <1>; ++ status = "ok"; ++ ++ ks8851@0 { ++ compatible = "ks8851"; ++ spi-max-frequency = <6000000>; ++ reg = <0>; ++ interrupt-parent = <&boardfpga>; ++ interrupts = <4>; ++ }; ++ }; ++ ++ uart4: uart@4000e400 { /* UART1 */ ++ location = <2>; ++ status = "ok"; ++ }; ++ ++ boardfpga: boardfpga { ++ compatible = "efm32board"; ++ reg = <0x80000000 0x400>; ++ irq-gpios = <&gpio 64 1>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ status = "ok"; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/efm32gg.dtsi b/arch/arm/boot/dts/efm32gg.dtsi +new file mode 100644 +index 0000000..a342ab0 +--- /dev/null ++++ b/arch/arm/boot/dts/efm32gg.dtsi +@@ -0,0 +1,172 @@ ++/* ++ * Device tree for Energy Micro EFM32 Giant Gecko SoC. ++ * ++ * Documentation available from ++ * http://www.silabs.com/Support%20Documents/TechnicalDocs/EFM32GG-RM.pdf ++ */ ++#include "armv7-m.dtsi" ++#include "dt-bindings/clock/efm32-cmu.h" ++ ++/ { ++ aliases { ++ i2c0 = &i2c0; ++ i2c1 = &i2c1; ++ serial0 = &uart0; ++ serial1 = &uart1; ++ serial2 = &uart2; ++ serial3 = &uart3; ++ serial4 = &uart4; ++ spi0 = &spi0; ++ spi1 = &spi1; ++ spi2 = &spi2; ++ }; ++ ++ soc { ++ adc: adc@40002000 { ++ compatible = "efm32,adc"; ++ reg = <0x40002000 0x400>; ++ interrupts = <7>; ++ clocks = <&cmu clk_HFPERCLKADC0>; ++ status = "disabled"; ++ }; ++ ++ gpio: gpio@40006000 { ++ compatible = "efm32,gpio"; ++ reg = <0x40006000 0x1000>; ++ interrupts = <1 11>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ clocks = <&cmu clk_HFPERCLKGPIO>; ++ status = "ok"; ++ }; ++ ++ i2c0: i2c@4000a000 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "efm32,i2c"; ++ reg = <0x4000a000 0x400>; ++ interrupts = <9>; ++ clocks = <&cmu clk_HFPERCLKI2C0>; ++ clock-frequency = <100000>; ++ status = "disabled"; ++ }; ++ ++ i2c1: i2c@4000a400 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "efm32,i2c"; ++ reg = <0x4000a400 0x400>; ++ interrupts = <10>; ++ clocks = <&cmu clk_HFPERCLKI2C1>; ++ clock-frequency = <100000>; ++ status = "disabled"; ++ }; ++ ++ spi0: spi@4000c000 { /* USART0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "efm32,spi"; ++ reg = <0x4000c000 0x400>; ++ interrupts = <3 4>; ++ clocks = <&cmu clk_HFPERCLKUSART0>; ++ status = "disabled"; ++ }; ++ ++ spi1: spi@4000c400 { /* USART1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "efm32,spi"; ++ reg = <0x4000c400 0x400>; ++ interrupts = <15 16>; ++ clocks = <&cmu clk_HFPERCLKUSART1>; ++ status = "disabled"; ++ }; ++ ++ spi2: spi@40x4000c800 { /* USART2 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "efm32,spi"; ++ reg = <0x4000c800 0x400>; ++ interrupts = <18 19>; ++ clocks = <&cmu clk_HFPERCLKUSART2>; ++ status = "disabled"; ++ }; ++ ++ uart0: uart@4000c000 { /* USART0 */ ++ compatible = "efm32,uart"; ++ reg = <0x4000c000 0x400>; ++ interrupts = <3 4>; ++ clocks = <&cmu clk_HFPERCLKUSART0>; ++ status = "disabled"; ++ }; ++ ++ uart1: uart@4000c400 { /* USART1 */ ++ compatible = "efm32,uart"; ++ reg = <0x4000c400 0x400>; ++ interrupts = <15 16>; ++ clocks = <&cmu clk_HFPERCLKUSART1>; ++ status = "disabled"; ++ }; ++ ++ uart2: uart@40x4000c800 { /* USART2 */ ++ compatible = "efm32,uart"; ++ reg = <0x4000c800 0x400>; ++ interrupts = <18 19>; ++ clocks = <&cmu clk_HFPERCLKUSART2>; ++ status = "disabled"; ++ }; ++ ++ uart3: uart@4000e000 { /* UART0 */ ++ compatible = "efm32,uart"; ++ reg = <0x4000e000 0x400>; ++ interrupts = <20 21>; ++ clocks = <&cmu clk_HFPERCLKUART0>; ++ status = "disabled"; ++ }; ++ ++ uart4: uart@4000e400 { /* UART1 */ ++ compatible = "efm32,uart"; ++ reg = <0x4000e400 0x400>; ++ interrupts = <22 23>; ++ clocks = <&cmu clk_HFPERCLKUART1>; ++ status = "disabled"; ++ }; ++ ++ timer0: timer@40010000 { ++ compatible = "efm32,timer"; ++ reg = <0x40010000 0x400>; ++ interrupts = <2>; ++ clocks = <&cmu clk_HFPERCLKTIMER0>; ++ }; ++ ++ timer1: timer@40010400 { ++ compatible = "efm32,timer"; ++ reg = <0x40010400 0x400>; ++ interrupts = <12>; ++ clocks = <&cmu clk_HFPERCLKTIMER1>; ++ }; ++ ++ timer2: timer@40010800 { ++ compatible = "efm32,timer"; ++ reg = <0x40010800 0x400>; ++ interrupts = <13>; ++ clocks = <&cmu clk_HFPERCLKTIMER2>; ++ }; ++ ++ timer3: timer@40010c00 { ++ compatible = "efm32,timer"; ++ reg = <0x40010c00 0x400>; ++ interrupts = <14>; ++ clocks = <&cmu clk_HFPERCLKTIMER3>; ++ }; ++ ++ cmu: cmu@400c8000 { ++ compatible = "efm32gg,cmu"; ++ reg = <0x400c8000 0x400>; ++ interrupts = <32>; ++ #clock-cells = <1>; ++ }; ++ }; ++}; diff --git a/patches/linux-3.12-rc4/0014-ARM-efm32-some-more-stuff.patch b/patches/linux-3.12-rc4/0014-ARM-efm32-some-more-stuff.patch new file mode 100644 index 0000000..c6cd381 --- /dev/null +++ b/patches/linux-3.12-rc4/0014-ARM-efm32-some-more-stuff.patch @@ -0,0 +1,298 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Tue, 12 Mar 2013 14:44:10 +0100 +Subject: [PATCH] ARM: efm32: some more stuff +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/Kconfig-nommu | 4 + + arch/arm/mach-efm32/Makefile | 2 +- + arch/arm/mach-efm32/common.c | 199 ++++++++++++++++++++++++++++++++++++++++ + arch/arm/mach-efm32/common.h | 3 + + arch/arm/mach-efm32/dtmachine.c | 12 +++ + 5 files changed, 219 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/mach-efm32/common.c + create mode 100644 arch/arm/mach-efm32/common.h + +diff --git a/arch/arm/Kconfig-nommu b/arch/arm/Kconfig-nommu +index aed66d5..6128083 100644 +--- a/arch/arm/Kconfig-nommu ++++ b/arch/arm/Kconfig-nommu +@@ -11,18 +11,22 @@ config SET_MEM_PARAM + + config DRAM_BASE + hex '(S)DRAM Base Address' if SET_MEM_PARAM ++ default 0x88000000 if MACH_EFM32GG_DK3750 + default 0x00800000 + + config DRAM_SIZE + hex '(S)DRAM SIZE' if SET_MEM_PARAM ++ default 0x00400000 if MACH_EFM32GG_DK3750 + default 0x00800000 + + config FLASH_MEM_BASE + hex 'FLASH Base Address' if SET_MEM_PARAM ++ default 0x00000000 if MACH_EFM32GG_DK3750 + default 0x00400000 + + config FLASH_SIZE + hex 'FLASH Size' if SET_MEM_PARAM ++ default 0x00100000 if MACH_EFM32GG_DK3750 + default 0x00400000 + + config PROCESSOR_ID +diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile +index 3a74af7..081f45a 100644 +--- a/arch/arm/mach-efm32/Makefile ++++ b/arch/arm/mach-efm32/Makefile +@@ -1 +1 @@ +-obj-y += dtmachine.o ++obj-y += common.o dtmachine.o +diff --git a/arch/arm/mach-efm32/common.c b/arch/arm/mach-efm32/common.c +new file mode 100644 +index 0000000..bffc28e +--- /dev/null ++++ b/arch/arm/mach-efm32/common.c +@@ -0,0 +1,199 @@ ++/* ++ * Copyright (C) 2012-2013 Uwe Kleine-Koenig for Pengutronix ++ * ++ * This program is free software; you can redistribute it and/or modify it under ++ * the terms of the GNU General Public License version 2 as published by the ++ * Free Software Foundation. ++ */ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++ ++#define MEM_INFO_FLASH (void __iomem *)0x0fe081f8 ++#define MEM_INFO_RAM (void __iomem *)0x0fe081fa ++#define PART_NUMBER (void __iomem *)0x0fe081fc ++#define PART_FAMILY (void __iomem *)0x0fe081fe ++#define PROD_REV (void __iomem *)0x0fe081ff ++ ++static const struct efm32_family_mapping { ++ u8 id; ++ const char *name; ++ const char *abbrev; ++} efm32_family_mapping[] __initconst = { ++ { ++ .id = 71, ++ .name = "Gecko", ++ .abbrev = "G", ++ }, { ++ .id = 72, ++ .name = "Giant Gecko", ++ .abbrev = "GG", ++ }, { ++ .id = 73, ++ .name = "Tiny Gecko", ++ .abbrev = "TG", ++ }, { ++ .id = 74, ++ .name = "Leopard Gecko", ++ .abbrev = "LG", ++ }, { ++ .id = 75, ++ .name = "Zero Gecko", ++ .abbrev = "ZG", ++ }, ++}; ++ ++static const char *__init efm32_get_familyname(u8 id) ++{ ++ size_t i; ++ ++ for (i = 0; i < ARRAY_SIZE(efm32_family_mapping) && ++ efm32_family_mapping[i].id <= id; ++i) { ++ if (efm32_family_mapping[i].id == id) ++ return efm32_family_mapping[i].name; ++ } ++ ++ return "unknown"; ++} ++ ++static const char *__init efm32_get_familyabbrev(u8 id) ++{ ++ size_t i; ++ ++ for (i = 0; i < ARRAY_SIZE(efm32_family_mapping) && ++ efm32_family_mapping[i].id <= id; ++i) { ++ if (efm32_family_mapping[i].id == id) ++ return efm32_family_mapping[i].abbrev; ++ } ++ ++ return "unknown"; ++} ++ ++static char revbuf[4] __initdata = ""; ++static volatile const u32 * const romtable = (void *)0xe00fffe0; ++ ++static const char *__init efm32_get_rev(void) ++{ ++ if (revbuf[0] == '\0') { ++ u32 major = romtable[0] & 0x3f; ++ u32 minor = (romtable[2] & 0xf0) | ((romtable[3] >> 4) & 0x0f); ++ ++ if (minor < 25) ++ sprintf(revbuf, "%u%c", major, 'A' + minor); ++ else { ++ revbuf[0] = '?'; ++ revbuf[1] = '\0'; ++ } ++ } ++ return revbuf; ++} ++ ++void __init efm32_print_cpuinfo(void) ++{ ++ u16 partno = __raw_readw(PART_NUMBER); ++ u8 family = __raw_readb(PART_FAMILY); ++ u8 rev = __raw_readb(PROD_REV); ++ u16 flashsize = __raw_readw(MEM_INFO_FLASH); ++ u16 raminfo = __raw_readw(MEM_INFO_RAM); ++ ++ pr_info("Energy Micro %s, EFM32%s%hdF%hd (rev %s, prodrev %hhd), %hd kB RAM\n", ++ efm32_get_familyname(family), ++ efm32_get_familyabbrev(family), partno, ++ flashsize, efm32_get_rev(), rev, raminfo); ++} ++ ++static const struct { ++ u32 value; ++ u32 mask; ++ const char *cause; ++} efm32_reset_causes[] __initconst = { ++ { ++ .value = 0x0001, ++ .mask = 0x0001, ++ .cause = "A Power-on Reset has been performed", ++ }, { ++ .value = 0x0002, ++ .mask = 0x0083, ++ .cause = "A Brown-out has been detected on the unregulated power", ++ }, { ++ .value = 0x0004, ++ .mask = 0x001f, ++ .cause = "A Brown-out has been detected on the regulated power", ++ }, { ++ .value = 0x0008, ++ .mask = 0x000b, ++ .cause = "An external reset has been applied", ++ }, { ++ .value = 0x0010, ++ .mask = 0x0013, ++ .cause = "A watchdog reset has occurred", ++ }, { ++ .value = 0x0020, ++ .mask = 0x07ff, ++ .cause = "A lockup reset has occurred", ++ }, { ++ .value = 0x0040, ++ .mask = 0x07df, ++ .cause = "A system request reset has occurred", ++ }, { ++ .value = 0x0080, ++ .mask = 0x0799, ++ .cause = "The system as woken up from EM4", ++ }, { ++ .value = 0x0180, ++ .mask = 0x799, ++ .cause = "The system as woken up from EM4 on an EM4 wakeup reset request from pin", ++ }, { ++ .value = 0x0200, ++ .mask = 0x079f, ++ .cause = "A Brown-out has been detected on Analog Power Domain 0 (AVDD0)", ++ }, { ++ .value = 0x0400, ++ .mask = 0x079f, ++ .cause = "A Brown-out has been detected on Analog Power Domain 1 (AVDD1)", ++ }, { ++ .value = 0x0800, ++ .mask = 0x0800, ++ .cause = "A Brown-out has been detected by the Backup BOD on VDD_DREG", ++ }, { ++ .value = 0x1000, ++ .mask = 0x1000, ++ .cause = "A Brown-out has been detected by the Backup BOD on BU_VIN", ++ }, { ++ .value = 0x2000, ++ .mask = 0x2000, ++ .cause = "A Brown-out has been detected by the Backup BOD on unregulated power", ++ }, { ++ .value= 0x4000, ++ .mask = 0x4000, ++ .cause = "A Brown-out has been detected by the Backup BOD on regulated power", ++ }, { ++ .value = 0x8000, ++ .mask = 0x8000, ++ .cause = "The system has been in Backup mode", ++ }, ++}; ++ ++void __init efm32_print_reset_cause(void) ++{ ++ u32 rmu_rstcause = __raw_readl((void __iomem *)0x400ca004); ++ int i; ++ ++ pr_info("Reset Cause: 0x%08x\n", rmu_rstcause); ++ ++ for (i = 0; i < ARRAY_SIZE(efm32_reset_causes); ++i) { ++ if ((rmu_rstcause & efm32_reset_causes[i].mask) == ++ efm32_reset_causes[i].value) ++ pr_info(" `-> %s.\n", efm32_reset_causes[i].cause); ++ } ++ ++ /* clear RMU_RSTCAUSE */ ++ __raw_writel(1, (void __iomem *)0x400ca008); ++ __raw_writel(1, (void __iomem *)0x400c6024); ++ __raw_writel(0, (void __iomem *)0x400c6024); ++} +diff --git a/arch/arm/mach-efm32/common.h b/arch/arm/mach-efm32/common.h +new file mode 100644 +index 0000000..dd8f865 +--- /dev/null ++++ b/arch/arm/mach-efm32/common.h +@@ -0,0 +1,3 @@ ++void efm32_print_cpuinfo(void); ++ ++void efm32_print_reset_cause(void); +diff --git a/arch/arm/mach-efm32/dtmachine.c b/arch/arm/mach-efm32/dtmachine.c +index 2367495..8fa5d56 100644 +--- a/arch/arm/mach-efm32/dtmachine.c ++++ b/arch/arm/mach-efm32/dtmachine.c +@@ -1,15 +1,27 @@ + #include ++#include + + #include + + #include + ++#include "common.h" ++ ++static void __init efm32_init(void) ++{ ++ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); ++ ++ efm32_print_reset_cause(); ++ efm32_print_cpuinfo(); ++} ++ + static const char *const efm32gg_compat[] __initconst = { + "efm32,dk3750", + NULL + }; + + DT_MACHINE_START(EFM32DT, "EFM32 (Device Tree Support)") ++ .init_machine = efm32_init, + .dt_compat = efm32gg_compat, + .restart = armv7m_restart, + MACHINE_END diff --git a/patches/linux-3.12-rc4/0015-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch b/patches/linux-3.12-rc4/0015-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch new file mode 100644 index 0000000..a33add0 --- /dev/null +++ b/patches/linux-3.12-rc4/0015-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch @@ -0,0 +1,410 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Tue, 12 Feb 2013 23:31:27 +0100 +Subject: [PATCH] gpio: new driver for Energy Micro's GPIO component + +--- + drivers/gpio/Kconfig | 4 + + drivers/gpio/Makefile | 1 + + drivers/gpio/gpio-efm32.c | 366 ++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 371 insertions(+) + create mode 100644 drivers/gpio/gpio-efm32.c + +diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig +index b6ed304..2a3c5af 100644 +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -127,6 +127,10 @@ config GPIO_IT8761E + help + Say yes here to support GPIO functionality of IT8761E super I/O chip. + ++config GPIO_EFM32 ++ tristate "Energy Micro EFM32 GPIO support" ++ depends on ARCH_EFM32 ++ + config GPIO_EM + tristate "Emma Mobile GPIO" + depends on ARM +diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile +index 98e23eb..9b66f5f 100644 +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -22,6 +22,7 @@ obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o + obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o + obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o + obj-$(CONFIG_ARCH_DAVINCI) += gpio-davinci.o ++obj-$(CONFIG_GPIO_EFM32) += gpio-efm32.o + obj-$(CONFIG_GPIO_EM) += gpio-em.o + obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o + obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o +diff --git a/drivers/gpio/gpio-efm32.c b/drivers/gpio/gpio-efm32.c +new file mode 100644 +index 0000000..01addc7 +--- /dev/null ++++ b/drivers/gpio/gpio-efm32.c +@@ -0,0 +1,366 @@ ++/* ++ * Copyright (C) 2013 Pengutronix ++ * Uwe Kleine-Koenig ++ * ++ * This program is free software; you can redistribute it and/or modify it under ++ * the terms of the GNU General Public License version 2 as published by the ++ * Free Software Foundation. ++ * ++ * TODO: ++ * - disable clk in suspend iff no irq is enabled to wake the system ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define DRIVER_NAME "efm32-gpio" ++ ++#define GPIO_Px_MODEL(p) (0x024 * (p) + 0x004) ++#define GPIO_Px_MODEH(p) (0x024 * (p) + 0x008) ++#define GPIO_Px_DOUT(p) (0x024 * (p) + 0x00c) ++#define GPIO_Px_DOUTSET(p) (0x024 * (p) + 0x010) ++#define GPIO_Px_DOUTCLR(p) (0x024 * (p) + 0x014) ++#define GPIO_Px_DIN(p) (0x024 * (p) + 0x01c) ++#define GPIO_EXTIPSELL 0x100 ++#define GPIO_EXTIPSELH 0x104 ++#define GPIO_IEN 0x110 ++#define GPIO_IF 0x114 ++#define GPIO_IFC 0x11c ++ ++struct efm32_gpio_ddata { ++ void __iomem *base; ++ spinlock_t lock; ++ struct clk *clk; ++ unsigned int irq_even, irq_odd; ++ struct irq_domain *irq_domain; ++ struct gpio_chip chip; ++ unsigned assigned_irqpins; ++}; ++ ++#define to_ddata(chip) container_of(chip, struct efm32_gpio_ddata, chip) ++ ++static unsigned efm32_gpio_get_mode(struct efm32_gpio_ddata *ddata, ++ unsigned pin, unsigned port) ++{ ++ return (readl(ddata->base + (pin < 8 ? GPIO_Px_MODEL(port) : GPIO_Px_MODEH(port))) >> (4 * (pin & 7))) & 0xf; ++ ++} ++static int efm32_gpio_direction_input(struct gpio_chip *chip, unsigned offset) ++{ ++ struct efm32_gpio_ddata *ddata = to_ddata(chip); ++ unsigned pin = offset % 16; ++ unsigned port = offset / 16; ++ unsigned mode; ++ int ret; ++ ++ mode = efm32_gpio_get_mode(ddata, pin, port); ++ ++ /* ++ * XXX: don't reconfigure, needs to be resolved in combination with a ++ * pinmux driver ++ */ ++ if (mode > 0 && mode < 4) ++ ret = 0; ++ else ++ ret = -EIO; ++ ++ return ret; ++} ++ ++static int efm32_gpio_get(struct gpio_chip *chip, unsigned offset) ++{ ++ struct efm32_gpio_ddata *ddata = to_ddata(chip); ++ unsigned pin = offset % 16; ++ unsigned port = offset / 16; ++ ++ /* XXX use bitband to simplify? */ ++ return readl(ddata->base + GPIO_Px_DIN(port)) & (1 << pin); ++} ++ ++static int efm32_gpio_direction_output(struct gpio_chip *chip, ++ unsigned offset, int value) ++{ ++ struct efm32_gpio_ddata *ddata = to_ddata(chip); ++ unsigned pin = offset % 16; ++ unsigned port = offset / 16; ++ unsigned mode; ++ int ret; ++ ++ mode = efm32_gpio_get_mode(ddata, pin, port); ++ /* ++ * XXX: don't reconfigure, needs to be resolved in combination with a ++ * pinmux driver ++ */ ++ if (mode >= 4) ++ ret = 0; ++ else ++ ret = -EIO; ++ ++ return ret; ++} ++ ++static void efm32_gpio_set(struct gpio_chip *chip, ++ unsigned offset, int value) ++{ ++ struct efm32_gpio_ddata *ddata = to_ddata(chip); ++ unsigned pin = offset % 16; ++ unsigned port = offset / 16; ++ ++ writel(1 << pin, ddata->base + ++ (value ? GPIO_Px_DOUTSET(port) : GPIO_Px_DOUTCLR(port))); ++} ++ ++static int efm32_gpio_to_irq(struct gpio_chip *chip, unsigned offset) ++{ ++ struct efm32_gpio_ddata *ddata = to_ddata(chip); ++ unsigned pin = offset % 16; ++ unsigned port = offset / 16; ++ unsigned extipsel_offset = pin < 8 ? GPIO_EXTIPSELL : GPIO_EXTIPSELH; ++ unsigned extipsel; ++ unsigned extipsel_shift = (pin % 8) * 4; ++ ++ spin_lock(&ddata->lock); ++ ++ extipsel = readl(ddata->base + extipsel_offset); ++ ++ if (ddata->assigned_irqpins & (1 << pin)) { ++ if (((extipsel >> extipsel_shift) & 0x7) != port) { ++ spin_unlock(&ddata->lock); ++ clk_disable(ddata->clk); ++ return -EBUSY; ++ } ++ } ++ ++ extipsel &= ~(0x7 << extipsel_shift); ++ extipsel |= port << extipsel_shift; ++ ddata->assigned_irqpins |= 1 << pin; ++ writel(extipsel, ddata->base + extipsel_offset); ++ ++ spin_unlock(&ddata->lock); ++ ++ return irq_create_mapping(ddata->irq_domain, offset % 16); ++} ++ ++static irqreturn_t efm32_gpio_handler(struct efm32_gpio_ddata *ddata, unsigned mask) ++{ ++ unsigned flag, init_flag; ++ irqreturn_t iret = IRQ_NONE; ++ ++ init_flag = flag = readl(ddata->base + GPIO_IF) & mask; ++ ++ while (flag) { ++ int line = __fls(flag); ++ ++ writel(1 << line, ddata->base + GPIO_IFC); ++ if (generic_handle_irq(irq_create_mapping(ddata->irq_domain, line))) ++ iret = IRQ_HANDLED; ++ ++ flag &= ~(1 << line); ++ } ++ return iret; ++} ++ ++static irqreturn_t efm32_gpio_handler_even(int irq, void *data) ++{ ++ struct efm32_gpio_ddata *ddata = data; ++ return efm32_gpio_handler(ddata, 0x55555555U); ++} ++ ++static irqreturn_t efm32_gpio_handler_odd(int irq, void *data) ++{ ++ struct efm32_gpio_ddata *ddata = data; ++ return efm32_gpio_handler(ddata, 0xaaaaaaaaU); ++} ++ ++static void efm32_gpio_irq_ack(struct irq_data *data) ++{ ++ struct efm32_gpio_ddata *ddata = irq_get_chip_data(data->irq); ++ ++ writel(1 << data->hwirq, ddata->base + GPIO_IFC); ++} ++ ++static void efm32_gpio_irq_mask(struct irq_data *data) ++{ ++ struct efm32_gpio_ddata *ddata = irq_get_chip_data(data->irq); ++ unsigned ien; ++ ++ spin_lock(&ddata->lock); ++ ien = readl(ddata->base + GPIO_IEN); ++ ien &= ~(1 << data->hwirq); ++ writel(ien, ddata->base + GPIO_IEN); ++ spin_unlock(&ddata->lock); ++} ++ ++static void efm32_gpio_irq_unmask(struct irq_data *data) ++{ ++ struct efm32_gpio_ddata *ddata = irq_get_chip_data(data->irq); ++ unsigned ien; ++ ++ spin_lock(&ddata->lock); ++ ien = readl(ddata->base + GPIO_IEN); ++ ien |= 1 << data->hwirq; ++ writel(ien, ddata->base + GPIO_IEN); ++ spin_unlock(&ddata->lock); ++} ++ ++static struct irq_chip efm32_gpio_irqchip = { ++ .irq_ack = efm32_gpio_irq_ack, ++ .irq_mask = efm32_gpio_irq_mask, ++ .irq_unmask = efm32_gpio_irq_unmask, ++}; ++ ++static int efm32_gpio_irq_map(struct irq_domain *d, unsigned int virq, ++ irq_hw_number_t hw) ++{ ++ struct efm32_gpio_ddata *ddata = d->host_data; ++ ++ irq_set_chip_data(virq, ddata); ++ irq_set_chip_and_handler(virq, &efm32_gpio_irqchip, handle_edge_irq); ++ ++ set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops efm32_gpio_irq_domain_ops = { ++ .map = efm32_gpio_irq_map, ++}; ++ ++static int efm32_gpio_probe(struct platform_device *pdev) ++{ ++ struct efm32_gpio_ddata *ddata; ++ struct resource *res; ++ int ret = -ENOMEM; ++ int irq_even, irq_odd; ++ ++ ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); ++ if (!ddata) { ++ dev_err(&pdev->dev, "cannot allocate driver data"); ++ return -ENOMEM; ++ } ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ dev_err(&pdev->dev, "can't get device resources\n"); ++ return -ENOENT; ++ } ++ ++ ddata->clk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(ddata->clk)) { ++ ret = PTR_ERR(ddata->clk); ++ dev_err(&pdev->dev, "can't get clock (%d)\n", ret); ++ return ret; ++ } ++ ++ irq_even = platform_get_irq(pdev, 0); ++ irq_odd = platform_get_irq(pdev, 1); ++ if (irq_even <= 0 || irq_odd <= 0) { ++ dev_err(&pdev->dev, "can't get irq numbers (%d, %d)\n", ++ irq_even, irq_odd); ++ return -ENOENT; ++ } ++ ddata->irq_even = irq_even; ++ ddata->irq_odd = irq_odd; ++ ++ ddata->base = devm_request_and_ioremap(&pdev->dev, res); ++ if (!ddata->base) { ++ dev_err(&pdev->dev, ++ "cannot request and ioremap register set\n"); ++ return -EADDRNOTAVAIL; ++ } ++ ++ spin_lock_init(&ddata->lock); ++ ++ ret = clk_prepare_enable(ddata->clk); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "cannot enable clock (%d)\n", ret); ++ return ret; ++ } ++ ++ /* disable and clear irqs */ ++ writel(0, ddata->base + GPIO_IEN); ++ writel(0xffff, ddata->base + GPIO_IFC); ++ ++ ddata->irq_domain = irq_domain_add_linear(pdev->dev.of_node, ++ 16, &efm32_gpio_irq_domain_ops, ddata); ++ if (!ddata->irq_domain) { ++ dev_err(&pdev->dev, "failed to add irq_domain\n"); ++ goto err_add_irq_domain; ++ } ++ ++ ddata->chip.label = DRIVER_NAME; ++ ddata->chip.dev = &pdev->dev; ++ ddata->chip.owner = THIS_MODULE; ++ ++ //ddata->chip.get_direction ++ ddata->chip.direction_input = efm32_gpio_direction_input; ++ ddata->chip.get = efm32_gpio_get; ++ ddata->chip.direction_output = efm32_gpio_direction_output; ++ ddata->chip.set = efm32_gpio_set; ++ ddata->chip.to_irq = efm32_gpio_to_irq; ++ ddata->chip.base = -1; ++ ddata->chip.ngpio = 96; ++ ddata->chip.can_sleep = 0; ++ ++ ret = request_irq(ddata->irq_even, efm32_gpio_handler_even, ++ 0, DRIVER_NAME, ddata); ++ if (ret) ++ goto err_request_even_irq; ++ ++ ret = request_irq(ddata->irq_odd, efm32_gpio_handler_odd, ++ 0, DRIVER_NAME, ddata); ++ if (ret) ++ goto err_request_odd_irq; ++ ++ ret = gpiochip_add(&ddata->chip); ++ if (ret) { ++ free_irq(ddata->irq_odd, ddata); ++err_request_odd_irq: ++ ++ free_irq(ddata->irq_even, ddata); ++err_request_even_irq: ++ ++ irq_domain_remove(ddata->irq_domain); ++ } ++ ++err_add_irq_domain: ++ return ret; ++} ++ ++static const struct of_device_id efm32_gpio_dt_ids[] = { ++ { ++ .compatible = "efm32,gpio", ++ }, { ++ /* sentinel */ ++ } ++}; ++MODULE_DEVICE_TABLE(of, efm32_gpio_dt_ids); ++ ++static struct platform_driver efm32_gpio_driver = { ++ .probe = efm32_gpio_probe, ++ ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .of_match_table = efm32_gpio_dt_ids, ++ }, ++}; ++ ++static int __init efm32_gpio_init(void) ++{ ++ return platform_driver_register(&efm32_gpio_driver); ++} ++postcore_initcall(efm32_gpio_init); ++ ++MODULE_LICENSE("GPL v2"); diff --git a/patches/linux-3.12-rc4/0016-efm-board-controller-driver.patch b/patches/linux-3.12-rc4/0016-efm-board-controller-driver.patch new file mode 100644 index 0000000..3aded06 --- /dev/null +++ b/patches/linux-3.12-rc4/0016-efm-board-controller-driver.patch @@ -0,0 +1,239 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Thu, 7 Feb 2013 09:45:30 +0100 +Subject: [PATCH] efm board controller driver + +--- + drivers/mfd/Kconfig | 5 ++ + drivers/mfd/Makefile | 1 + + drivers/mfd/efm32board.c | 194 +++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 200 insertions(+) + create mode 100644 drivers/mfd/efm32board.c + +diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig +index 914c3d1..317482c 100644 +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -1065,6 +1065,11 @@ config MFD_ARIZONA_SPI + Support for the Wolfson Microelectronics Arizona platform audio SoC + core functionality controlled via I2C. + ++config MFD_EFM32BOARD ++ tristate "efm32 board" ++ depends on ARM && (ARCH_EFM32 || COMPILE_TEST) ++ select MFD_CORE ++ + config MFD_WM5102 + bool "Wolfson Microelectronics WM5102" + depends on MFD_ARIZONA +diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile +index 15b905c..ef22ea7 100644 +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -37,6 +37,7 @@ obj-$(CONFIG_MFD_ARIZONA) += arizona-core.o + obj-$(CONFIG_MFD_ARIZONA) += arizona-irq.o + obj-$(CONFIG_MFD_ARIZONA_I2C) += arizona-i2c.o + obj-$(CONFIG_MFD_ARIZONA_SPI) += arizona-spi.o ++obj-$(CONFIG_MFD_EFM32BOARD) += efm32board.o + ifneq ($(CONFIG_MFD_WM5102),n) + obj-$(CONFIG_MFD_ARIZONA) += wm5102-tables.o + endif +diff --git a/drivers/mfd/efm32board.c b/drivers/mfd/efm32board.c +new file mode 100644 +index 0000000..a719985 +--- /dev/null ++++ b/drivers/mfd/efm32board.c +@@ -0,0 +1,194 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "efm32board" ++ ++#define MAGIC 0x04 ++#define INTFLAG 0x40 ++#define INTEN 0x42 ++ ++struct efm32board_ddata { ++ void __iomem *base; ++ unsigned int irq; ++ struct irq_chip chip; ++ struct irq_domain *domain; ++}; ++ ++static void efm32board_irq_ack(struct irq_data *data) ++{ ++ struct efm32board_ddata *ddata = irq_get_chip_data(data->irq); ++ unsigned short val; ++ ++ /* XXX: locking */ ++ val = readw(ddata->base + INTFLAG); ++ val &= ~(1 << data->hwirq); ++ writew(val, ddata->base + INTFLAG); ++} ++ ++static void efm32board_irq_mask(struct irq_data *data) ++{ ++ struct efm32board_ddata *ddata = irq_get_chip_data(data->irq); ++ unsigned short val; ++ ++ if (data->hwirq != 2) { ++ /* XXX: locking */ ++ val = readw(ddata->base + INTEN); ++ val &= ~(1 << data->hwirq); ++ writew(val, ddata->base + INTEN); ++ } ++} ++ ++static void efm32board_irq_unmask(struct irq_data *data) ++{ ++ struct efm32board_ddata *ddata = irq_get_chip_data(data->irq); ++ unsigned short val; ++ ++ /* XXX: locking */ ++ val = readw(ddata->base + INTEN); ++ val |= 1 << data->hwirq; ++ writew(val, ddata->base + INTEN); ++} ++ ++static irqreturn_t efm32board_handler(int irq, void *data) ++{ ++ unsigned short val; ++ struct efm32board_ddata *ddata = data; ++ irqreturn_t ret = IRQ_NONE; ++ ++ val = readw(ddata->base + INTFLAG); ++ /* ack BC irq */ ++ writew(0, ddata->base + INTFLAG); ++ ++ pr_debug("%s: INTFLAG=%hx\n", __func__, val); ++ ++ while (val) { ++ int line = __fls(val); ++ ++ if (!generic_handle_irq(irq_create_mapping(ddata->domain, line))) ++ ret = IRQ_HANDLED; ++ val &= ~(1 << line); ++ } ++ return ret; ++} ++ ++int efm32board_irqdomain_map(struct irq_domain *d, unsigned int virq, ++ irq_hw_number_t hw) ++{ ++ struct efm32board_ddata *ddata = d->host_data; ++ ++ irq_set_chip_data(virq, ddata); ++ irq_set_chip_and_handler(virq, &ddata->chip, handle_edge_irq); ++ ++ set_irq_flags(virq, IRQF_VALID); ++ ++ return 0; ++} ++ ++const struct irq_domain_ops efm32board_irqdomain_ops = { ++ .map = efm32board_irqdomain_map, ++ .xlate = irq_domain_xlate_onecell, ++}; ++ ++static int efm32board_probe(struct platform_device *pdev) ++{ ++ struct resource *res; ++ int irq, gpio, ret; ++ struct efm32board_ddata *ddata; ++ unsigned short val; ++ ++ ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); ++ if (!ddata) { ++ dev_err(&pdev->dev, "cannot allocate driver data"); ++ return -ENOMEM; ++ } ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ dev_err(&pdev->dev, "can't get device resources\n"); ++ return -ENOENT; ++ } ++ ++ gpio = of_get_named_gpio_flags(pdev->dev.of_node, "irq-gpios", 0, NULL); ++ if (gpio < 0) { ++ dev_err(&pdev->dev, "can't get irq gpio\n"); ++ return gpio; ++ } ++ ++ ret = gpio_request(gpio, DRIVER_NAME); ++ if (ret) { ++ dev_err(&pdev->dev, "cannot request irq gpio\n"); ++ return ret; ++ } ++ ++ ret = gpio_direction_input(gpio); ++ if (ret) { ++ dev_err(&pdev->dev, "cannot configure irq gpio as input\n"); ++ return ret; ++ } ++ ++ irq = gpio_to_irq(gpio); ++ if (irq <= 0) { ++ dev_err(&pdev->dev, "can't get irq number\n"); ++ return irq < 0 ? irq : -ENOENT; ++ } ++ ddata->irq = irq; ++ ++ ddata->base = devm_request_and_ioremap(&pdev->dev, res); ++ if (!ddata->base) { ++ dev_err(&pdev->dev, "cannot request and ioremap register set\n"); ++ return -EADDRNOTAVAIL; ++ } ++ ++ val = readw(ddata->base + MAGIC); ++ if (val != 0xef32) { ++ dev_err(&pdev->dev, "Magic not found (0x%hx)\n", val); ++ return -ENODEV; ++ } ++ ++ /* disable and clear all irqs */ ++ writew(0, ddata->base + INTEN); ++ writew(0, ddata->base + INTFLAG); ++ ++ /* XXX: enable joystick irq */ ++ writew(4, ddata->base + INTEN); ++ ++ ddata->chip.name = DRIVER_NAME; ++ ddata->chip.irq_ack = efm32board_irq_ack; ++ ddata->chip.irq_mask = efm32board_irq_mask; ++ ddata->chip.irq_unmask = efm32board_irq_unmask; ++ ++ ret = request_irq(irq, efm32board_handler, 0, DRIVER_NAME, ddata); ++ if (ret) ++ goto err_request_irq; ++ ++ ddata->domain = irq_domain_add_simple(pdev->dev.of_node, 5, 0, ++ &efm32board_irqdomain_ops, ddata); ++ if (!ddata->domain) { ++ ret = -ENOMEM; ++ dev_err(&pdev->dev, "cannot create irq domain\n"); ++ ++ free_irq(irq, ddata); ++ } ++err_request_irq: ++ return ret; ++} ++ ++static const struct of_device_id efm32board_dt_ids[] = { ++ { .compatible = "efm32board", }, ++ { /* sentinel */ } ++}; ++ ++static struct platform_driver efm32board_driver = { ++ .probe = efm32board_probe, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .of_match_table = efm32board_dt_ids, ++ }, ++}; ++module_platform_driver(efm32board_driver); diff --git a/patches/linux-3.12-rc4/0017-hwmon-efm32-adc-new-driver.patch b/patches/linux-3.12-rc4/0017-hwmon-efm32-adc-new-driver.patch new file mode 100644 index 0000000..0e7b231 --- /dev/null +++ b/patches/linux-3.12-rc4/0017-hwmon-efm32-adc-new-driver.patch @@ -0,0 +1,375 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Thu, 9 Feb 2012 22:35:24 +0100 +Subject: [PATCH] hwmon/efm32-adc: new driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Uwe Kleine-König +--- + drivers/hwmon/Kconfig | 10 ++ + drivers/hwmon/Makefile | 1 + + drivers/hwmon/efm32-adc.c | 321 ++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 332 insertions(+) + create mode 100644 drivers/hwmon/efm32-adc.c + +diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig +index b3ab9d4..3788c4b 100644 +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -382,6 +382,16 @@ config SENSORS_DA9055 + This driver can also be built as a module. If so, the module + will be called da9055-hwmon. + ++config SENSORS_EFM32_ADC ++ tristate "Energy Micro EFM32 ADC" ++ depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) ++ help ++ If you say yes here you get support for Energy Micro's ADC ++ build into their EFM32 SoCs ++ ++ This driver can also be built as a module. If so, the module ++ will be called efm32-adc. ++ + config SENSORS_I5K_AMB + tristate "FB-DIMM AMB temperature sensor on Intel 5000 series chipsets" + depends on PCI +diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile +index ec7cde0..442f586 100644 +--- a/drivers/hwmon/Makefile ++++ b/drivers/hwmon/Makefile +@@ -51,6 +51,7 @@ obj-$(CONFIG_SENSORS_DA9055)+= da9055-hwmon.o + obj-$(CONFIG_SENSORS_DME1737) += dme1737.o + obj-$(CONFIG_SENSORS_DS620) += ds620.o + obj-$(CONFIG_SENSORS_DS1621) += ds1621.o ++obj-$(CONFIG_SENSORS_EFM32_ADC) += efm32-adc.o + obj-$(CONFIG_SENSORS_EMC1403) += emc1403.o + obj-$(CONFIG_SENSORS_EMC2103) += emc2103.o + obj-$(CONFIG_SENSORS_EMC6W201) += emc6w201.o +diff --git a/drivers/hwmon/efm32-adc.c b/drivers/hwmon/efm32-adc.c +new file mode 100644 +index 0000000..fa4bd21 +--- /dev/null ++++ b/drivers/hwmon/efm32-adc.c +@@ -0,0 +1,321 @@ ++#define DEBUG ++/* ++ * Energy Micro EFM32 adc ++ * ++ * Copyright (C) 2012 Uwe Kleine-Koenig for Pengutronix ++ * ++ * This program is free software; you can redistribute it and/or modify it under ++ * the terms of the GNU General Public License version 2 as published by the ++ * Free Software Foundation. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "efm32-adc" ++ ++#define ADC_CTRL 0x000 ++ ++#define ADC_CMD 0x004 ++#define ADC_CMD_SINGLESTART 0x00000001 ++#define ADC_CMD_SINGLESTOP 0x00000002 ++#define ADC_CMD_SCANSTART 0x00000004 ++#define ADC_CMD_SCANSTOP 0x00000008 ++ ++#define ADC_STATUS 0x008 ++#define ADC_STATUS_SINGLEDV 0x00010000 ++#define ADC_SINGLECTRL 0x00c ++#define ADC_SINGLEDATA 0x024 ++ ++#define ADC_IEN 0x014 ++#define ADC_IF 0x018 ++#define ADC_IFC 0x020 ++#define ADC_IF_SINGLE 0x00000001 ++ ++struct efm32_adc_ddata { ++ struct device *hwmondev; ++ void __iomem *base; ++ struct clk *clk; ++ unsigned int irq; ++ spinlock_t lock; ++ unsigned int busy; ++}; ++ ++static void efm32_adc_write32(struct efm32_adc_ddata *ddata, ++ u32 value, unsigned offset) ++{ ++ writel_relaxed(value, ddata->base + offset); ++} ++ ++static u32 efm32_adc_read32(struct efm32_adc_ddata *ddata, unsigned offset) ++{ ++ return readl_relaxed(ddata->base + offset); ++} ++ ++static ssize_t efm32_adc_show_name(struct device *dev, ++ struct device_attribute *devattr, char *buf) ++{ ++ return sprintf(buf, "efm32\n"); ++} ++ ++struct efm32_adc_irqdata { ++ struct efm32_adc_ddata *ddata; ++ struct completion done; ++}; ++ ++static irqreturn_t efm32_adc_irq(int irq, void *data) ++{ ++ struct efm32_adc_irqdata *irqdata = data; ++ u32 iflag = efm32_adc_read32(irqdata->ddata, ADC_IF); ++ ++ if (iflag & ADC_IF_SINGLE) { ++ efm32_adc_write32(irqdata->ddata, ADC_IF_SINGLE, ADC_IFC); ++ complete(&irqdata->done); ++ return IRQ_HANDLED; ++ } ++ ++ return IRQ_NONE; ++} ++ ++static int efm32_adc_read_single(struct device *dev, ++ struct device_attribute *devattr, unsigned int *val) ++{ ++ struct platform_device *pdev = to_platform_device(dev); ++ struct efm32_adc_ddata *ddata = platform_get_drvdata(pdev); ++ int ret; ++ struct efm32_adc_irqdata irqdata = { .ddata = ddata, }; ++ u32 status; ++ unsigned long freq; ++ ++ ret = clk_prepare(ddata->clk); ++ if (ret < 0) { ++ dev_dbg(ddata->hwmondev, "failed to enable clk (%d)\n", ret); ++ return ret; ++ } ++ ++ spin_lock_irq(&ddata->lock); ++ if (ddata->busy) { ++ dev_dbg(ddata->hwmondev, "busy\n"); ++ ret = -EBUSY; ++ goto out_unlock; ++ } ++ ++ init_completion(&irqdata.done); ++ ++ ret = clk_enable(ddata->clk); ++ if (ret < 0) { ++ dev_dbg(ddata->hwmondev, "failed to enable clk (%d)\n", ret); ++ goto out_unlock; ++ } ++ freq = clk_get_rate(ddata->clk); ++ ++ efm32_adc_write32(ddata, ++ ADC_CMD_SINGLESTOP | ADC_CMD_SCANSTOP, ADC_CMD); ++ efm32_adc_write32(ddata, ((freq - 1) / 1000000) << 16 | ++ ((freq / 400000) - 1) << 8, ADC_CTRL); ++ efm32_adc_write32(ddata, 0x800, ADC_SINGLECTRL); ++ efm32_adc_write32(ddata, ADC_IF_SINGLE, ADC_IFC); ++ efm32_adc_write32(ddata, ADC_CMD_SINGLESTART, ADC_CMD); ++ ++ ret = request_irq(ddata->irq, efm32_adc_irq, 0, DRIVER_NAME, &irqdata); ++ if (ret) { ++ efm32_adc_write32(ddata, ADC_CMD_SINGLESTOP, ADC_CMD); ++ goto out_clkoff; ++ } ++ ++ efm32_adc_write32(ddata, ADC_IF_SINGLE, ADC_IEN); ++ ++ ddata->busy = 1; ++ ++ spin_unlock_irq(&ddata->lock); ++ ++ ret = wait_for_completion_interruptible_timeout(&irqdata.done, 2 * HZ); ++ ++ spin_lock_irq(&ddata->lock); ++ ++ efm32_adc_write32(ddata, 0, ADC_IEN); ++ free_irq(ddata->irq, &irqdata); ++ ++ if (ret < 0) ++ goto done_out_unlock; ++ ++ status = efm32_adc_read32(ddata, ADC_STATUS); ++ if (status & ADC_STATUS_SINGLEDV) { ++ *val = efm32_adc_read32(ddata, ADC_SINGLEDATA); ++ ret = 0; ++ } else ++ ret = -ETIMEDOUT; ++ ++done_out_unlock: ++ ddata->busy = 0; ++out_clkoff: ++ clk_disable(ddata->clk); ++out_unlock: ++ spin_unlock_irq(&ddata->lock); ++ ++ clk_unprepare(ddata->clk); ++ ++ return ret; ++} ++ ++static ssize_t efm32_adc_read_chan(struct device *dev, ++ struct device_attribute *devattr, char *buf) ++{ ++ unsigned int val; ++ int ret = efm32_adc_read_single(dev, devattr, &val); ++ ++ if (ret) ++ return ret; ++ ++ return sprintf(buf, "%u\n", val); ++} ++ ++static ssize_t efm32_adc_read_temp(struct device *dev, ++ struct device_attribute *devattr, char *buf) ++{ ++ unsigned int val; ++ int ret = efm32_adc_read_single(dev, devattr, &val); ++ /* ++ * XXX: get these via pdata or read them from the device information ++ * registers ++ */ ++ unsigned temp0 = 0x19 * 1000; ++ unsigned adc0 = 0x910; ++ ++ if (ret) ++ return ret; ++ ++ val = temp0 + DIV_ROUND_CLOSEST((adc0 - val) * 10000, 63); ++ ++ return sprintf(buf, "%u\n", val); ++} ++ ++static DEVICE_ATTR(name, S_IRUGO, efm32_adc_show_name, NULL); ++static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, efm32_adc_read_chan, NULL, 8); ++static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, efm32_adc_read_temp, NULL, 8); ++ ++static struct attribute *efm32_adc_attr[] = { ++ &dev_attr_name.attr, ++ &sensor_dev_attr_in8_input.dev_attr.attr, ++ &sensor_dev_attr_temp1_input.dev_attr.attr, ++ NULL ++}; ++ ++static const struct attribute_group efm32_adc_group = { ++ .attrs = efm32_adc_attr, ++}; ++ ++static int efm32_adc_probe(struct platform_device *pdev) ++{ ++ struct efm32_adc_ddata *ddata; ++ struct resource *res; ++ int ret; ++ ++ ddata = kzalloc(sizeof(*ddata), GFP_KERNEL); ++ if (!ddata) ++ return -ENOMEM; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ ret = -ENXIO; ++ dev_dbg(&pdev->dev, "failed to determine base address\n"); ++ goto err_get_base; ++ } ++ ++ ret = platform_get_irq(pdev, 0); ++ if (ret <= 0) { ++ ret = -ENXIO; ++ dev_dbg(&pdev->dev, "failed to determine irq\n"); ++ goto err_get_irq; ++ } ++ ddata->irq = ret; ++ ++ ddata->base = ioremap(res->start, resource_size(res)); ++ if (!ddata->base) { ++ ret = -ENOMEM; ++ dev_dbg(&pdev->dev, "failed to remap\n"); ++ goto err_ioremap; ++ } ++ ++ ddata->clk = clk_get(&pdev->dev, NULL); ++ if (IS_ERR(ddata->clk)) { ++ ret = PTR_ERR(ddata->clk); ++ dev_dbg(&pdev->dev, "failed to get clock\n"); ++ goto err_clk_get; ++ } ++ ++ platform_set_drvdata(pdev, ddata); ++ spin_lock_init(&ddata->lock); ++ ++ ret = sysfs_create_group(&pdev->dev.kobj, &efm32_adc_group); ++ if (ret) ++ goto err_create_group; ++ ++ ddata->hwmondev = hwmon_device_register(&pdev->dev); ++ if (IS_ERR(ddata->hwmondev)) { ++ ret = PTR_ERR(ddata->hwmondev); ++ ++ sysfs_remove_group(&pdev->dev.kobj, &efm32_adc_group); ++err_create_group: ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ clk_put(ddata->clk); ++err_clk_get: ++ ++ iounmap(ddata->base); ++err_ioremap: ++err_get_irq: ++err_get_base: ++ kfree(ddata); ++ } ++ ++ return ret; ++} ++ ++static int efm32_adc_remove(struct platform_device *pdev) ++{ ++ struct efm32_adc_ddata *ddata = platform_get_drvdata(pdev); ++ ++ hwmon_device_unregister(ddata->hwmondev); ++ sysfs_remove_group(&pdev->dev.kobj, &efm32_adc_group); ++ platform_set_drvdata(pdev, NULL); ++ clk_put(ddata->clk); ++ iounmap(ddata->base); ++ kfree(ddata); ++ ++ return 0; ++} ++ ++static const struct of_device_id efm32_adc_dt_ids[] = { ++ { ++ .compatible = "efm32,adc", ++ }, { ++ /* sentinel */ ++ } ++}; ++MODULE_DEVICE_TABLE(of, efm32_adc_dt_ids); ++ ++static struct platform_driver efm32_adc_driver = { ++ .probe = efm32_adc_probe, ++ .remove = efm32_adc_remove, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .of_match_table = efm32_adc_dt_ids, ++ }, ++}; ++module_platform_driver(efm32_adc_driver); ++ ++MODULE_AUTHOR("Uwe Kleine-Koenig "); ++MODULE_DESCRIPTION("EFM32 ADC driver"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:" DRIVER_NAME); diff --git a/patches/linux-3.12-rc4/0018-ARM-v7m-add-trivial-suspend-support.patch b/patches/linux-3.12-rc4/0018-ARM-v7m-add-trivial-suspend-support.patch new file mode 100644 index 0000000..0ad4b16 --- /dev/null +++ b/patches/linux-3.12-rc4/0018-ARM-v7m-add-trivial-suspend-support.patch @@ -0,0 +1,25 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Wed, 1 Feb 2012 10:00:00 +0100 +Subject: [PATCH] ARM: v7m: add trivial suspend support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index cc24241..66ccc7c 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -2283,7 +2283,7 @@ source "kernel/power/Kconfig" + config ARCH_SUSPEND_POSSIBLE + depends on !ARCH_S5PC100 + depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \ +- CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK ++ CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK + def_bool y + + config ARM_CPU_SUSPEND diff --git a/patches/linux-3.12-rc4/0019-ARM-efm32-add-trivial-suspend-support.patch b/patches/linux-3.12-rc4/0019-ARM-efm32-add-trivial-suspend-support.patch new file mode 100644 index 0000000..89f91da --- /dev/null +++ b/patches/linux-3.12-rc4/0019-ARM-efm32-add-trivial-suspend-support.patch @@ -0,0 +1,101 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Wed, 1 Feb 2012 10:00:21 +0100 +Subject: [PATCH] ARM: efm32: add trivial suspend support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/mach-efm32/Makefile | 2 ++ + arch/arm/mach-efm32/cmu.h | 15 +++++++++++++ + arch/arm/mach-efm32/pm.c | 50 ++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 67 insertions(+) + create mode 100644 arch/arm/mach-efm32/cmu.h + create mode 100644 arch/arm/mach-efm32/pm.c + +diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile +index 081f45a..b295a74 100644 +--- a/arch/arm/mach-efm32/Makefile ++++ b/arch/arm/mach-efm32/Makefile +@@ -1 +1,3 @@ + obj-y += common.o dtmachine.o ++ ++obj-$(CONFIG_PM) += pm.o +diff --git a/arch/arm/mach-efm32/cmu.h b/arch/arm/mach-efm32/cmu.h +new file mode 100644 +index 0000000..a7e5741 +--- /dev/null ++++ b/arch/arm/mach-efm32/cmu.h +@@ -0,0 +1,15 @@ ++/* ++ * Register definition for efm32's CMU component ++ */ ++ ++#define CMU_OSCENCMD 0x20 ++#define CMU_OSCENCMD_HFXOEN 0x00000004 ++ ++#define CMU_CMD 0x24 ++#define CMU_CMD_HFCLKSEL_HFXO 0x00000002 ++ ++#define CMU_STATUS 0x2c ++#define CMU_STATUS_HFRCOSEL 0x00000400 ++#define CMU_STATUS_HFXOSEL 0x00000800 ++ ++#define CMU_HFPERCLKEN0 0x44 +diff --git a/arch/arm/mach-efm32/pm.c b/arch/arm/mach-efm32/pm.c +new file mode 100644 +index 0000000..282205e +--- /dev/null ++++ b/arch/arm/mach-efm32/pm.c +@@ -0,0 +1,50 @@ ++#include ++#include ++ ++#include ++#include ++ ++#include "cmu.h" ++ ++#define CMU_BASE IOMEM(0x400c8000) ++ ++#define scb_writel(val, addroff) writel(val, BASEADDR_V7M_SCB + addroff) ++ ++static int efm32_suspend_enter(suspend_state_t state) ++{ ++ u32 cmu_status = readl(CMU_BASE + CMU_STATUS); ++ ++ /* ++ * setting SLEEPDEEP makes the efm32 enter EM2 or EM3 (iff both ++ * LFACLK and LFBCLK are off). ++ */ ++ scb_writel(V7M_SCB_SCR_SLEEPDEEP, V7M_SCB_SCR); ++ ++ cpu_do_idle(); ++ ++ scb_writel(0, V7M_SCB_SCR); ++ ++ /* ++ * deep sleep disables the HF oscilator, reenable it if it was on ++ * before. ++ */ ++ if (cmu_status & CMU_STATUS_HFXOSEL) { ++ writel(CMU_OSCENCMD_HFXOEN, CMU_BASE + CMU_OSCENCMD); ++ writel(CMU_CMD_HFCLKSEL_HFXO, CMU_BASE + CMU_CMD); ++ } ++ ++ return 0; ++} ++ ++static const struct platform_suspend_ops efm32_suspend_ops = { ++ .valid = suspend_valid_only_mem, ++ .enter = efm32_suspend_enter, ++}; ++ ++static int __init efm32_pm_init(void) ++{ ++ suspend_set_ops(&efm32_suspend_ops); ++ ++ return 0; ++} ++arch_initcall(efm32_pm_init); diff --git a/patches/linux-3.12-rc4/0020-ARM-efm32gg-dk3750-add-simple-framebuffer.patch b/patches/linux-3.12-rc4/0020-ARM-efm32gg-dk3750-add-simple-framebuffer.patch new file mode 100644 index 0000000..a713354 --- /dev/null +++ b/patches/linux-3.12-rc4/0020-ARM-efm32gg-dk3750-add-simple-framebuffer.patch @@ -0,0 +1,48 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 18 Nov 2013 09:45:45 +0100 +Subject: [PATCH] ARM: efm32gg-dk3750: add simple-framebuffer + +--- + arch/arm/Kconfig | 1 + + arch/arm/boot/dts/efm32gg-dk3750.dts | 11 ++++++++++- + 2 files changed, 11 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 66ccc7c..68e58b2 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1605,6 +1605,7 @@ endchoice + + config PAGE_OFFSET + hex ++ default PHYS_OFFSET if !MMU + default 0x40000000 if VMSPLIT_1G + default 0x80000000 if VMSPLIT_2G + default 0xC0000000 +diff --git a/arch/arm/boot/dts/efm32gg-dk3750.dts b/arch/arm/boot/dts/efm32gg-dk3750.dts +index aa5c0f6..aeda85e 100644 +--- a/arch/arm/boot/dts/efm32gg-dk3750.dts ++++ b/arch/arm/boot/dts/efm32gg-dk3750.dts +@@ -17,7 +17,7 @@ + }; + + memory { +- reg = <0x88000000 0x400000>; ++ reg = <0x88000000 0x3da000>; + }; + + soc { +@@ -83,4 +83,13 @@ + status = "ok"; + }; + }; ++ ++ framebuffer { ++ compatible = "simple-framebuffer"; ++ reg = <0x883da000 (320 * 240 * 2)>; ++ width = <320>; ++ height = <240>; ++ stride = <(320 * 2)>; ++ format = "r5g6b5"; ++ }; + }; diff --git a/patches/linux-3.12-rc4/0021-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch b/patches/linux-3.12-rc4/0021-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch new file mode 100644 index 0000000..a7366a3 --- /dev/null +++ b/patches/linux-3.12-rc4/0021-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch @@ -0,0 +1,306 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Sun, 30 Oct 2011 21:11:05 +0100 +Subject: [PATCH] HACK! ARM: allow a bootloader to be embedded and do it on + efm32 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/kernel/vmlinux.lds.S | 5 + + arch/arm/mach-efm32/Makefile | 8 ++ + arch/arm/mach-efm32/bootloader.S | 252 +++++++++++++++++++++++++++++++++++++++ + 3 files changed, 265 insertions(+) + create mode 100644 arch/arm/mach-efm32/bootloader.S + +diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S +index 7bcee5c..1f34cf8 100644 +--- a/arch/arm/kernel/vmlinux.lds.S ++++ b/arch/arm/kernel/vmlinux.lds.S +@@ -86,6 +86,11 @@ SECTIONS + #else + . = PAGE_OFFSET + TEXT_OFFSET; + #endif ++ ++ .bootloader : { ++ *(.bootloader) ++ } ++ + .head.text : { + _text = .; + HEAD_TEXT +diff --git a/arch/arm/mach-efm32/Makefile b/arch/arm/mach-efm32/Makefile +index b295a74..b28d37c 100644 +--- a/arch/arm/mach-efm32/Makefile ++++ b/arch/arm/mach-efm32/Makefile +@@ -1,3 +1,11 @@ ++ifeq ($(CONFIG_FLASH_MEM_BASE),0x00000000) ++obj-y += bootloader.o ++endif ++ ++ifeq ($(CONFIG_USE_OF),y) ++$(obj)/bootloader.o: $(obj)/../boot/dts/efm32gg-dk3750.dtb ++endif ++ + obj-y += common.o dtmachine.o + + obj-$(CONFIG_PM) += pm.o +diff --git a/arch/arm/mach-efm32/bootloader.S b/arch/arm/mach-efm32/bootloader.S +new file mode 100644 +index 0000000..d4dbf0b +--- /dev/null ++++ b/arch/arm/mach-efm32/bootloader.S +@@ -0,0 +1,252 @@ ++#if defined(CONFIG_OF) ++#define EFM32_USE_OF ++#endif ++#define EFM32_DT_IN_SRAM ++ ++/* UART1 */ ++#define UARTBASE 0x4000e400 ++#define UARTLOCATION 2 ++ ++ .thumb ++ ++ .section ".bootloader","ax" ++ ++ /* M3 Vector table */ ++ .int 0x10001000 @ Initial SP value ++ .int reset + 1 @ Reset ++ ++reset: ++ /* init external RAM, serial port, EBI and stuff */ ++ adr r0, reginit ++1: ++ ldr r1, [r0] ++ ldr r2, [r0, #4] ++ str r2, [r1] ++ add r0, #8 ++ cmp r0, #(reginit_end) ++ blo 1b ++ ++ ++ /* init some BC registers */ ++ adr r0, bcinit ++1: ++ ldrh r1, [r0] ++ ldrh r2, [r0, #2] ++ add r1, r1, #0x80000000 ++ strh r2, [r1] ++ add r0, #4 ++ cmp r0, #(bcinit_end) ++ blo 1b ++ ++ /* give mux some time to enable the level shifter */ ++ ldr r0, =0x4000 ++1: subs r0, r0, #1 ++ bne 1b ++ ++ ldr r0, =(UARTBASE + 0x34) ++ mov r1, 0x55 ++ str r1, [r0] ++ ++ /* Zero PSRAM */ ++ ldr r0, =(0x88000000) ++ ldr r1, =(0x88400000) ++ mov r2, #0 ++ mov r3, #0 ++ mov r4, #0 ++ mov r5, #0 ++1: stmia r0!, {r2-r5} ++ cmp r0, r1 ++ bcc 1b ++ ++ /* assert zeroing succeeded */ ++ ldr r6, =(UARTBASE + 0x34) ++ mov r7, #'<' ++ str r7, [r6] ++ mov r7, #'*' ++ ldr r0, =(0x88000000) ++1: ldmia r0!, {r2-r5} ++ orr r2, r3 ++ orr r4, r5 ++ orr r2, r4 ++ cmp r2, #0 ++ it ne ++ strne r7, [r6] ++ cmp r0, r1 ++ bcc 1b ++ mov r7, #'>' ++ str r7, [r6] ++ ++#if defined(EFM32_USE_OF) && defined(EFM32_DT_IN_SRAM) ++#define dtbaddr 0x10000000 ++ ldr r0, =(dtbaddr) ++ ldr r1, =(dtb) ++ adr r2, dtbend ++ subs r2, r2, r1 ++ bl _memcpy ++#endif ++ /* detect machine type; easy we know this is an efm32gg_dk3750 */ ++ movw r0, #0 ++ movw r1, #0xf11 @ machid for efm32gg_dk3750 ++#ifdef EFM32_USE_OF ++#ifdef EFM32_DT_IN_SRAM ++ ldr r2, =(dtbaddr) ++#else ++ adr r2, dtb ++#endif ++#else ++ adr r2, ataglist ++#endif ++ movw r3, #0 ++ movw r4, #0 ++ movw r5, #0 ++ movw r6, #0 ++ movw r7, #0 ++ ++ b stext ++ ++#ifdef EFM32_DT_IN_SRAM ++_memcpy: ++ @ copies r2 bytes from r1 to r0 with r2 > 0 ++1: ++ ldrb r3, [r1], #1 ++ strb r3, [r0], #1 ++ subs r2, #1 ++ bhi 1b ++ bx lr ++#endif ++ ++ .ltorg ++ ++ .align 3 ++ /* register value pairs to initialize the machine */ ++ .type reginit, %object ++reginit: ++ /* clocks */ ++ .int 0x400C8020, 0x00000004 @ CMU_OSCENCMD |= HFXOEN ++ ++ .int 0x400c8008, 0x00000100 @ CMU_HFPERCLKDIV, reset default ++ .int 0x43900814, 0x00000001 @ CMU_HFCORECLKEN0 |= EBI via bitband ++ .int 0x439008b4, 0x00000001 @ CMU_HFPERCLKEN0 |= GPIO via bitband ++ .int 0x43900884, 0x00000001 @ CMU_HFPERCLKEN0 |= USART1 via bitband ++ .int 0x43900890, 0x00000001 @ CMU_HFPERCLKEN0 |= UART1 via bitband ++ ++ /* XXX */ ++ .int 0x439008c0, 0x00000001 @ CMU_HFPERCLKEN0 |= ADC via bitband ++ ++ /* pinmuxing */ ++ .int 0x40006000, 0x00000000 @ GPIO_PA_CTRL, reset default ++ .int 0x40006014, 0x0000807f @ GPIO_PA_DOUTCLR; EBI AD8..15 set dataout to 0 ++ .int 0x40006004, 0x04444444 @ GPIO_PA_MODEL; EBI AD9..15 set mode=pushpull ++ .int 0x40006008, 0x40000000 @ GPIO_PA_MODEH; EBI AD8 set mode=pushpull ++ .int 0x40006024, 0x00000000 @ GPIO_PB_CTRL, reset default ++ .int 0x40006038, 0x00008000 @ GPIO_PB_DOUTCLR; EBI mode on PB15 MCU_EBI_CONNECT (0) ++ .int 0x40006038, 0x0000007f @ GPIO_PB_DOUTCLR; EBI A16-22 ++ .int 0x40006028, 0x04444444 @ GPIO_PB_MODEL; EBI A16-22 ++ .int 0x40006034, 0x00000200 @ GPIO_PB_DOUTSET; set UART_TX to avoid false start ++ .int 0x4000602c, 0x40000140 @ GPIO_PB_MODEH; MCU_EBI_CONNECT -> output, UART_TX, UART_RX ++ ++ .int 0x40006048, 0x00000000 @ GPIO_PC_CTRL, reset default ++ .int 0x4000605c, 0x00000001 @ GPIO_PC_DOUTCLR; PC11 (EBI_ALE) ++ .int 0x40006050, 0x00004000 @ GPIO_PC_MODEH; PC11: Push-pull output ++ .int 0x4000606c, 0x00000000 @ GPIO_PD_CTRL, reset default ++ .int 0x4000607c, 0x00003e08 @ GPIO_PD_DOUTSET, EBI CS0-3, spiconnect set dataout to 1; ETH_SPI_#CS (D3) ++ .int 0x40006080, 0x00000007 @ GPIO_PD_DOUTCLR, ETH_SPI_{TX, RX, CLK} ++ .int 0x40006070, 0x00004414 @ GPIO_PD_MODEL; ETH_SPI_ ++ .int 0x40006074, 0x00444440 @ GPIO_PD_MODEH; EBI CS0-3, spiconnect set mode=pushpull ++ .int 0x40006090, 0x00000000 @ GPIO_PE_CTRL, reset default ++ .int 0x400060a0, 0x00000001 @ GPIO_PE_DOUTSET; FPGA irq line ++ .int 0x400060a4, 0x0000ff00 @ GPIO_PE_DOUTCLR; EBI AD0..7 set dataout to 0 ++ .int 0x40006094, 0x00000002 @ GPIO_PE_MODEL; FPGA irq line set mode=inputpull ++ .int 0x40006098, 0x44444444 @ GPIO_PE_MODEH; EBI AD0..7 set mode=pushpull ++ ++ .int 0x400060b4, 0x00000000 @ GPIO_PF_CTRL, reset default ++ .int 0x400060c8, 0x000003c0 @ GPIO_PF_DOUTCLR; EBI Wen+Ren set dataout to 0 ++ .int 0x400060b8, 0x44000000 @ GPIO_PF_MODEL; EBI Byte Lane 0 support BL0/BL1 ++ .int 0x400060bc, 0x00000044 @ GPIO_PF_MODEH; EBI WEN, REN ++ ++ .int 0x40006100, 0x00000004 @ GPIO_EXTIPSELL: select port E for irq 0 ++ .int 0x4000610c, 0x00000001 @ GPIO_EXTIFALL: trigger for falling FPGA irq line ++ .int 0x4000611c, 0x0000ffff @ ? GPIO_IFC: clear all irqs ++ .int 0x40006110, 0x00000001 @ GPIO_IEN: enable irq 0 ++ ++ /* EBI */ ++ .int 0x40008000, 0x4f00d051 @ EBI_CTRL, enable ITS, mode0=mode2=mode3=D16A16ALE, bl0-3, noidle[023] ++ /* EBI PSRAM */ ++ .int 0x40008028, 0x10000000 @ EBI_ADDRTIMING2; HALFALE ++ .int 0x4000802c, 0x20000400 @ EBI_RDTIMING2; Prefetch, StrobeCycles = 4, HoldCycles = SetupCycles = 0 ++ .int 0x40008030, 0x00000200 @ EBI_WRTIMING2; StrobeCycles = 2, HoldCycles = SetupCycles = 0 ++ .int 0x40008034, 0x00000008 @ EBI_POLARITY2, ARDY_, ALE, WE_, RE_, CS_, BL_ ++ ++ /* Board Control FPGA */ ++ .int 0x40008004, 0x10000303 @ EBI_ADDRTIMING; HALFALE, HoldCycles = SetupCycles = 3 ++ .int 0x40008008, 0x00030703 @ EBI_RDTIMING; StrobeCycles = 7, HoldCycles = SetupCycles = 3 ++ .int 0x4000800c, 0x00030703 @ EBI_WRTIMING; StrobeCycles = 7, HoldCycles = SetupCycles = 3 ++ .int 0x40008010, 0x00000008 @ EBI_POLARITY, ARDY_, ALE, WE_, RE_, CS_, BL_ ++ ++ /* external NOR flash */ ++ .int 0x40008038, 0x10000000 @ EBI_ADDRTIMING3; HALFALE, HoldCycles = SetupCycles = 0 ++ .int 0x4000803c, 0x00000700 @ EBI_RDTIMING3; StrobeCycles = 7, HoldCycles = SetupCycles = 0 ++ .int 0x40008040, 0x00000200 @ EBI_WRTIMING3; StrobeCycles = 2, HoldCycles = SetupCycles =0 ++ .int 0x40008044, 0x00000008 @ EBI_POLARITY3, ARDY_, ALE, WE_, RE_, CS_, BL_ ++ ++ .int 0x40008014, 0x105e00bb @ EBI_ROUTE ++ .int 0x40008000, 0x4f00dd51 @ EBI_CTRL, enable ITS, mode0=mode2=mode3=D16A16ALE, bl0-3, noidle[023], bank[023]en ++ ++ .int UARTBASE + 0x00, 0x00000000 @ UART1_CTRL ++ .int UARTBASE + 0x04, 0x00001005 @ UART1_FRAME ++ .int UARTBASE + 0x14, 0x00001900 @ UART1_CLKDIV ++ .int UARTBASE + 0x0c, 0x00000c04 @ UART1_CMD ++ .int UARTBASE + 0x54, 0x00000003 + (UARTLOCATION << 8) @ UART1_ROUTE ++ .int 0x400c8024, 0x00000002 @ CMU_CMD = HFCLKSEL_HFXO ++ ++reginit_end: ++ .size reginit, . - reginit ++ ++ .align 3 ++ /* register value pairs to initialize the board controller */ ++ .type bcinit, %object ++bcinit: ++ .short 0x0018, 0x1300 @ enable UART mux and ETH ++ .short 0x0014, 0x0001 @ / ++ .short 0x001a, 0x0001 @ ETH ++ ++bcinit_end: ++ .size bcinit, . - bcinit ++ ++ .align 3 ++#ifdef EFM32_USE_OF ++ .type dtb, %object ++dtb: ++ .incbin "arch/arm/boot/dts/efm32gg-dk3750.dtb" ++dtbend: ++ .size dtb, . - dtb ++ .align 3 ++ ++#else /* ifdef CONFIG_OF */ ++ ++ .type ataglist, %object ++ataglist: ++ /* ATAG_CORE */ ++ .int 0x00000005 /* .size */ ++ .int 0x54410001 /* .tag = ATAG_CORE */ ++ .int 0x00000001 /* .flags */ ++ .int 0x00001000 /* .pagesize */ ++ .int 0x000000ff /* .rootdev */ ++ /* ATAG_MEM */ ++ .int 0x00000004 /* .size */ ++ .int 0x54410002 /* .tag = ATAG_MEM */ ++ .int 0x00400000 /* .size = 4 MiB */ ++ .int 0x88000000 /* .start = SRAM_BASE */ ++ /* ATAG_CMDLINE */ ++cmdline: ++ .int (cmdline_end - cmdline) >> 2 /* .size */ ++ .int 0x54410009 /* .tag = ATAG_CMDLINE */ ++ .asciz "console=ttyefm4,115200 ignore_loglevel ihash_entries=64 dhash_entries=64 rootfstype=romfs init=/linuxrc uclinux.physaddr=0x8c000000 root=/dev/mtdblock0 earlyprintk" ++ .align 2, 0 ++cmdline_end: ++ /* ATAG_NONE */ ++ .int 0x00000000 /* .size */ ++ .int 0x00000000 /* .tag = ATAG_NONE */ ++ataglist_end: ++ .size ataglist, . - ataglist ++#endif /* ifdef CONFIG_OF / else */ diff --git a/patches/linux-3.12-rc4/0022-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch b/patches/linux-3.12-rc4/0022-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch new file mode 100644 index 0000000..3106b9c --- /dev/null +++ b/patches/linux-3.12-rc4/0022-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch @@ -0,0 +1,31 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Tue, 13 Dec 2011 21:37:46 +0100 +Subject: [PATCH] HACK! don't reserve memory for device tree if it's below + PHYS_OFFSET +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This allows to keep the device tree blob in the unregistered 128k SRAM +on efm32. + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/kernel/devtree.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c +index f35906b..ba4e182 100644 +--- a/arch/arm/kernel/devtree.c ++++ b/arch/arm/kernel/devtree.c +@@ -43,6 +43,10 @@ void __init arm_dt_memblock_reserve(void) + if (!initial_boot_params) + return; + ++ if ((unsigned long)initial_boot_params < PHYS_OFFSET) ++ /* assume the dtb is located in ro memory */ ++ return; ++ + /* Reserve the dtb region */ + memblock_reserve(virt_to_phys(initial_boot_params), + be32_to_cpu(initial_boot_params->totalsize)); diff --git a/patches/linux-3.12-rc4/0023-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch b/patches/linux-3.12-rc4/0023-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch new file mode 100644 index 0000000..1b4874b --- /dev/null +++ b/patches/linux-3.12-rc4/0023-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch @@ -0,0 +1,37 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Wed, 14 Dec 2011 11:03:48 +0100 +Subject: [PATCH] HACK! make stack dumps provoked by BUG a bit more helpful +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +the right fix would be to continue unwinding at the end when process is +in handler mode + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/kernel/process.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c +index 94f6b05..541843b 100644 +--- a/arch/arm/kernel/process.c ++++ b/arch/arm/kernel/process.c +@@ -304,11 +304,17 @@ void __show_regs(struct pt_regs *regs) + #endif + } + ++#include ++ + void show_regs(struct pt_regs * regs) + { + printk("\n"); + __show_regs(regs); ++#ifdef CONFIG_CPU_V7M ++ unwind_backtrace(regs, current); ++#else + dump_stack(); ++#endif + } + + ATOMIC_NOTIFIER_HEAD(thread_notify_head); diff --git a/patches/linux-3.12-rc4/0024-HACK-ARM-increase-TASK_SIZE-for-MMU.patch b/patches/linux-3.12-rc4/0024-HACK-ARM-increase-TASK_SIZE-for-MMU.patch new file mode 100644 index 0000000..123c76a --- /dev/null +++ b/patches/linux-3.12-rc4/0024-HACK-ARM-increase-TASK_SIZE-for-MMU.patch @@ -0,0 +1,34 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Thu, 4 Oct 2012 13:32:51 +0200 +Subject: [PATCH] HACK! ARM: increase TASK_SIZE for !MMU +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This is needed for strncpy_from_user and friends since + + 8c56cc8 (ARM: 7449/1: use generic strnlen_user and strncpy_from_user functions) + +Signed-off-by: Uwe Kleine-König +--- + arch/arm/include/asm/memory.h | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h +index e750a93..f0155d4 100644 +--- a/arch/arm/include/asm/memory.h ++++ b/arch/arm/include/asm/memory.h +@@ -91,9 +91,12 @@ + * It is difficult to define and perhaps will never meet the original meaning + * of this define that was meant to. + * Fortunately, there is no reference for this in noMMU mode, for now. ++ * ++ * HACK: copy_from_user must even handle copying from flash. So don't impose a ++ * limit at all. Not sure this is correct ... + */ + #ifndef TASK_SIZE +-#define TASK_SIZE (CONFIG_DRAM_SIZE) ++#define TASK_SIZE (~0UL) + #endif + + #ifndef TASK_UNMAPPED_BASE diff --git a/patches/linux-3.12-rc4/0025-HACK-work-around-for-big-images.patch b/patches/linux-3.12-rc4/0025-HACK-work-around-for-big-images.patch new file mode 100644 index 0000000..87266ef --- /dev/null +++ b/patches/linux-3.12-rc4/0025-HACK-work-around-for-big-images.patch @@ -0,0 +1,20 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Thu, 7 Feb 2013 09:43:24 +0100 +Subject: [PATCH] HACK! work around for big images + +--- + arch/arm/kernel/head-nommu.S | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S +index 14235ba..3ae5375 100644 +--- a/arch/arm/kernel/head-nommu.S ++++ b/arch/arm/kernel/head-nommu.S +@@ -64,6 +64,7 @@ ENTRY(stext) + #endif + bl __lookup_processor_type @ r5=procinfo r9=cpuid + movs r10, r5 @ invalid processor (r5=0)? ++ it eq + beq __error_p @ yes, error 'p' + + #ifdef CONFIG_ARM_MPU diff --git a/patches/linux-3.12-rc4/0026-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch b/patches/linux-3.12-rc4/0026-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch new file mode 100644 index 0000000..f00e428 --- /dev/null +++ b/patches/linux-3.12-rc4/0026-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch @@ -0,0 +1,30 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Wed, 17 Apr 2013 11:52:22 +0200 +Subject: [PATCH] HACK! make printhex and printch work on efm32 with XIP + +On XIP the kernel image is readonly, so is the hexbuf array. Use some +SRAM instead. +--- + arch/arm/kernel/debug.S | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S +index 14f7c3b..e18cb30 100644 +--- a/arch/arm/kernel/debug.S ++++ b/arch/arm/kernel/debug.S +@@ -56,6 +56,7 @@ ENDPROC(printhex4) + ENTRY(printhex2) + mov r1, #2 + printhex: adr r2, hexbuf ++ ldr r2, =0x2001f000 + add r3, r2, r1 + mov r1, #0 + strb r1, [r3] +@@ -121,6 +122,7 @@ ENDPROC(printascii) + + ENTRY(printch) + adr r1, hexbuf ++ ldr r1, =0x2001f000 + strb r0, [r1] + mov r0, #0x03 @ SYS_WRITEC + ARM( svc #0x123456 ) diff --git a/patches/linux-3.12-rc4/0027-wip-i2c.patch b/patches/linux-3.12-rc4/0027-wip-i2c.patch new file mode 100644 index 0000000..90cea51 --- /dev/null +++ b/patches/linux-3.12-rc4/0027-wip-i2c.patch @@ -0,0 +1,588 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Tue, 5 Nov 2013 17:10:02 +0100 +Subject: [PATCH] wip: i2c + +--- + drivers/i2c/busses/Kconfig | 6 + + drivers/i2c/busses/Makefile | 1 + + drivers/i2c/busses/i2c-efm32.c | 519 ++++++++++++++++++++++++++++++++ + include/linux/platform_data/efm32-i2c.h | 15 + + 4 files changed, 541 insertions(+) + create mode 100644 drivers/i2c/busses/i2c-efm32.c + create mode 100644 include/linux/platform_data/efm32-i2c.h + +diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig +index cdcbd83..792d8de 100644 +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -421,6 +421,12 @@ config I2C_DESIGNWARE_PCI + This driver can also be built as a module. If so, the module + will be called i2c-designware-pci. + ++config I2C_EFM32 ++ tristate "EFM32 I2C controller" ++ depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) ++ help ++ This driver supports the i2c block found in Energy Micro's EFM32 SoCs. ++ + config I2C_EG20T + tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) I2C" + depends on PCI +diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile +index d00997f..b5def19 100644 +--- a/drivers/i2c/busses/Makefile ++++ b/drivers/i2c/busses/Makefile +@@ -41,6 +41,7 @@ obj-$(CONFIG_I2C_DESIGNWARE_PLATFORM) += i2c-designware-platform.o + i2c-designware-platform-objs := i2c-designware-platdrv.o + obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o + i2c-designware-pci-objs := i2c-designware-pcidrv.o ++obj-$(CONFIG_I2C_EFM32) += i2c-efm32.o + obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o + obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o + obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o +diff --git a/drivers/i2c/busses/i2c-efm32.c b/drivers/i2c/busses/i2c-efm32.c +new file mode 100644 +index 0000000..9b7f10b +--- /dev/null ++++ b/drivers/i2c/busses/i2c-efm32.c +@@ -0,0 +1,519 @@ ++/* ++ * Copyright (C) 2013 Uwe Kleine-Koenig for Pengutronix ++ * ++ * This program is free software; you can redistribute it and/or modify it under ++ * the terms of the GNU General Public License version 2 as published by the ++ * Free Software Foundation. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "efm32-i2c" ++ ++#define MASK_VAL(mask, val) ((val << __ffs(mask)) & mask) ++ ++#define REG_CTRL 0x00 ++#define REG_CTRL_EN 0x00001 ++#define REG_CTRL_SLAVE 0x00002 ++#define REG_CTRL_AUTOACK 0x00004 ++#define REG_CTRL_AUTOSE 0x00008 ++#define REG_CTRL_AUTOSN 0x00010 ++#define REG_CTRL_ARBDIS 0x00020 ++#define REG_CTRL_GCAMEN 0x00040 ++#define REG_CTRL_CLHR__MASK 0x00300 ++#define REG_CTRL_BITO__MASK 0x03000 ++#define REG_CTRL_BITO_OFF 0x00000 ++#define REG_CTRL_BITO_40PCC 0x01000 ++#define REG_CTRL_BITO_80PCC 0x02000 ++#define REG_CTRL_BITO_160PCC 0x03000 ++#define REG_CTRL_GIBITO 0x08000 ++#define REG_CTRL_CLTO__MASK 0x70000 ++#define REG_CTRL_CLTO_OFF 0x00000 ++ ++#define REG_CMD 0x04 ++#define REG_CMD_START 0x00001 ++#define REG_CMD_STOP 0x00002 ++#define REG_CMD_ACK 0x00004 ++#define REG_CMD_NACK 0x00008 ++#define REG_CMD_CONT 0x00010 ++#define REG_CMD_ABORT 0x00020 ++#define REG_CMD_CLEARTX 0x00040 ++#define REG_CMD_CLEARPC 0x00080 ++ ++#define REG_STATE 0x08 ++#define REG_STATE_BUSY 0x00001 ++#define REG_STATE_MASTER 0x00002 ++#define REG_STATE_TRANSMITTER 0x00004 ++#define REG_STATE_NACKED 0x00008 ++#define REG_STATE_BUSHOLD 0x00010 ++#define REG_STATE_STATE__MASK 0x000e0 ++#define REG_STATE_STATE_IDLE 0x00000 ++#define REG_STATE_STATE_WAIT 0x00020 ++#define REG_STATE_STATE_START 0x00040 ++#define REG_STATE_STATE_ADDR 0x00060 ++#define REG_STATE_STATE_ADDRACK 0x00080 ++#define REG_STATE_STATE_DATA 0x000a0 ++#define REG_STATE_STATE_DATAACK 0x000c0 ++ ++#define REG_STATUS 0x0c ++#define REG_STATUS_PSTART 0x00001 ++#define REG_STATUS_PSTOP 0x00002 ++#define REG_STATUS_PACK 0x00004 ++#define REG_STATUS_PNACK 0x00008 ++#define REG_STATUS_PCONT 0x00010 ++#define REG_STATUS_PABORT 0x00020 ++#define REG_STATUS_TXC 0x00040 ++#define REG_STATUS_TXBL 0x00080 ++#define REG_STATUS_RXDATAV 0x00100 ++ ++#define REG_CLKDIV 0x10 ++#define REG_CLKDIV_DIV__MASK 0x001ff ++#define REG_CLKDIV_DIV(div) MASK_VAL(REG_CLKDIV_DIV__MASK, (div)) ++ ++#define REG_SADDR 0x14 ++#define REG_SADDRMASK 0x18 ++#define REG_RXDATA 0x1c ++#define REG_RXDATAP 0x20 ++#define REG_TXDATA 0x24 ++#define REG_IF 0x28 ++#define REG_IF_START 0x00001 ++#define REG_IF_RSTART 0x00002 ++#define REG_IF_ADDR 0x00004 ++#define REG_IF_TXC 0x00008 ++#define REG_IF_TXBL 0x00010 ++#define REG_IF_RXDATAV 0x00020 ++#define REG_IF_ACK 0x00040 ++#define REG_IF_NACK 0x00080 ++#define REG_IF_MSTOP 0x00100 ++#define REG_IF_ARBLOST 0x00200 ++#define REG_IF_BUSERR 0x00400 ++#define REG_IF_BUSHOLD 0x00800 ++#define REG_IF_TXOF 0x01000 ++#define REG_IF_RXUF 0x02000 ++#define REG_IF_BITO 0x04000 ++#define REG_IF_CLTO 0x08000 ++#define REG_IF_SSTOP 0x10000 ++ ++#define REG_IFS 0x2c ++#define REG_IFC 0x30 ++#define REG_IFC__MASK 0x1ffcf ++ ++#define REG_IEN 0x34 ++ ++#define REG_ROUTE 0x38 ++#define REG_ROUTE_SDAPEN 0x00001 ++#define REG_ROUTE_SCLPEN 0x00002 ++#define REG_ROUTE_LOCATION__MASK 0x00700 ++#define REG_ROUTE_LOCATION(n) MASK_VAL(REG_ROUTE_LOCATION__MASK, (n)) ++ ++struct efm32_i2c_ddata { ++ struct i2c_adapter adapter; ++ spinlock_t lock; ++ ++ struct clk *clk; ++ void __iomem *base; ++ unsigned int irq; ++ struct efm32_i2c_pdata pdata; ++ ++ /* transfer data */ ++ struct completion done; ++ struct i2c_msg *msgs; ++ size_t num_msgs; ++ size_t current_word, current_msg; ++}; ++ ++static u32 efm32_i2c_read32(struct efm32_i2c_ddata *ddata, unsigned offset) ++{ ++ return readl_relaxed(ddata->base + offset); ++} ++ ++static void efm32_i2c_write32(struct efm32_i2c_ddata *ddata, ++ unsigned offset, u32 value) ++{ ++ writel_relaxed(value, ddata->base + offset); ++} ++ ++static void efm32_i2c_send_next_msg(struct efm32_i2c_ddata *ddata) ++{ ++ struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg]; ++ ++ dev_dbg(&ddata->adapter.dev, "send msg %zu/%zu (addr = %x, flags = %x, if = %08x)\n", ++ ddata->current_msg, ddata->num_msgs, cur_msg->addr, cur_msg->flags, efm32_i2c_read32(ddata, REG_IF)); ++ efm32_i2c_write32(ddata, REG_CMD, REG_CMD_START); ++ efm32_i2c_write32(ddata, REG_TXDATA, cur_msg->addr << 1 | ++ (cur_msg->flags & I2C_M_RD ? 1 : 0)); ++} ++ ++static void efm32_i2c_send_next_byte(struct efm32_i2c_ddata *ddata) ++{ ++ struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg]; ++ dev_dbg(&ddata->adapter.dev, "%s, %zu %zu\n", __func__, ddata->current_word, cur_msg->len); ++ if (ddata->current_word >= cur_msg->len) { ++ /* cur_msg completely transferred */ ++ ddata->current_word = 0; ++ ddata->current_msg += 1; ++ ++ if (ddata->current_msg >= ddata->num_msgs) { ++ dev_dbg(&ddata->adapter.dev, "Stop\n"); ++ efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP); ++ complete(&ddata->done); ++ } else { ++ efm32_i2c_send_next_msg(ddata); ++ } ++ } else { ++ dev_dbg(&ddata->adapter.dev, "send byte %zu/%zu\n", ++ ddata->current_word, cur_msg->len); ++ efm32_i2c_write32(ddata, REG_TXDATA, ++ cur_msg->buf[ddata->current_word++]); ++ } ++} ++ ++static void efm32_i2c_recv_next_byte(struct efm32_i2c_ddata *ddata) ++{ ++ struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg]; ++ ++ cur_msg->buf[ddata->current_word] = efm32_i2c_read32(ddata, REG_RXDATA); ++ dev_dbg(&ddata->adapter.dev, "recv byte %zu/%zu: 0x%02hhx\n", ++ ddata->current_word, cur_msg->len, cur_msg->buf[ddata->current_word]); ++ ddata->current_word += 1; ++ if (ddata->current_word >= cur_msg->len) { ++ /* cur_msg completely transferred */ ++ ddata->current_word = 0; ++ ddata->current_msg += 1; ++ ++ efm32_i2c_write32(ddata, REG_CMD, REG_CMD_NACK); ++ ++ if (ddata->current_msg >= ddata->num_msgs) { ++ efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP); ++ complete(&ddata->done); ++ } else { ++ efm32_i2c_send_next_msg(ddata); ++ } ++ } else { ++ efm32_i2c_write32(ddata, REG_CMD, REG_CMD_ACK); ++ } ++} ++ ++static irqreturn_t efm32_i2c_irq(int irq, void *dev_id) ++{ ++ struct efm32_i2c_ddata *ddata = dev_id; ++ struct i2c_msg *cur_msg = &ddata->msgs[ddata->current_msg]; ++ u32 irqflag = efm32_i2c_read32(ddata, REG_IF); ++ u32 state = efm32_i2c_read32(ddata, REG_STATE); ++ ++ dev_dbg(&ddata->adapter.dev, "irq: if: %08x, state: %08x, status: %08x\n", irqflag, state, efm32_i2c_read32(ddata, REG_STATUS)); ++ efm32_i2c_write32(ddata, REG_IFC, irqflag & REG_IFC__MASK); ++ ++ switch (state & REG_STATE_STATE__MASK) { ++ case REG_STATE_STATE_IDLE: ++ /* arbitration lost? */ ++ complete(&ddata->done); ++ break; ++ case REG_STATE_STATE_WAIT: ++ /* huh, this shouldn't happen */ ++ BUG(); ++ break; ++ case REG_STATE_STATE_START: ++ /* "caller" is expected to send an address */ ++ break; ++ case REG_STATE_STATE_ADDR: ++ /* wait for Ack or NAck of slave */ ++ break; ++ case REG_STATE_STATE_ADDRACK: ++ if (state & REG_STATE_NACKED) { ++ efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP); ++ complete(&ddata->done); ++ } else if (cur_msg->flags & I2C_M_RD) { ++ /* wait for slave to send first data byte */ ++ } else { ++ efm32_i2c_send_next_byte(ddata); ++ } ++ break; ++ case REG_STATE_STATE_DATA: ++ if (cur_msg->flags & I2C_M_RD) { ++ efm32_i2c_recv_next_byte(ddata); ++ } else { ++ /* wait for Ack or Nack of slave */ ++ } ++ break; ++ case REG_STATE_STATE_DATAACK: ++ if (state & REG_STATE_NACKED) { ++ efm32_i2c_write32(ddata, REG_CMD, REG_CMD_STOP); ++ complete(&ddata->done); ++ } else { ++ efm32_i2c_send_next_byte(ddata); ++ } ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int efm32_i2c_master_xfer(struct i2c_adapter *adap, ++ struct i2c_msg *msgs, int num) ++{ ++ struct efm32_i2c_ddata *ddata = i2c_get_adapdata(adap); ++ int ret = -EBUSY; ++ ++ spin_lock_irq(&ddata->lock); ++ ++ if (ddata->msgs) ++ /* can this happen? */ ++ goto out_unlock; ++ ++ ddata->msgs = msgs; ++ ddata->num_msgs = num; ++ ddata->current_word = 0; ++ ddata->current_msg = 0; ++ ++ init_completion(&ddata->done); ++ ++ dev_dbg(&ddata->adapter.dev, "state: %08x, status: %08x\n", efm32_i2c_read32(ddata, REG_STATE), efm32_i2c_read32(ddata, REG_STATUS)); ++ /* XXX: check TXBL */ ++ efm32_i2c_send_next_msg(ddata); ++ ++ spin_unlock_irq(&ddata->lock); ++ ++ wait_for_completion(&ddata->done); ++ ++ spin_lock_irq(&ddata->lock); ++ ++ if (ddata->current_msg >= ddata->num_msgs) ++ ret = ddata->num_msgs; ++ else ++ ret = -EIO; ++ ++ ddata->msgs = NULL; ++ ++out_unlock: ++ spin_unlock_irq(&ddata->lock); ++ return ret; ++} ++ ++static u32 efm32_i2c_functionality(struct i2c_adapter *adap) ++{ ++ /* XXX: some more? */ ++ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; ++} ++ ++static const struct i2c_algorithm efm32_i2c_algo = { ++ .master_xfer = efm32_i2c_master_xfer, ++ .functionality = efm32_i2c_functionality, ++}; ++ ++static u32 efm32_i2c_get_configured_location(struct efm32_i2c_ddata *ddata) ++{ ++ u32 reg = efm32_i2c_read32(ddata, REG_ROUTE); ++ ++ return (reg & REG_ROUTE_LOCATION__MASK) >> ++ __ffs(REG_ROUTE_LOCATION__MASK); ++} ++ ++static int efm32_i2c_probe_dt(struct platform_device *pdev, ++ struct efm32_i2c_ddata *ddata) ++{ ++ struct device_node *np = pdev->dev.of_node; ++ u32 location, frequency; ++ int ret; ++ ++ if (!np) ++ return 1; ++ ++ ret = of_property_read_u32(np, "location", &location); ++ if (!ret) { ++ dev_dbg(&pdev->dev, "using location %u\n", location); ++ } else { ++ /* default to location configured in hardware */ ++ location = efm32_i2c_get_configured_location(ddata); ++ ++ dev_info(&pdev->dev, "fall back to location %u\n", location); ++ } ++ ++ ddata->pdata.location = location; ++ ++ ret = of_property_read_u32(np, "clock-frequency", &frequency); ++ if (!ret) { ++ dev_dbg(&pdev->dev, "using frequency %u\n", frequency); ++ } else { ++ frequency = 100000; ++ dev_info(&pdev->dev, "defaulting to 100 kHz\n"); ++ } ++ ddata->pdata.frequency = frequency; ++ ++ /* i2c core takes care about bus numbering using an alias */ ++ ddata->adapter.nr = -1; ++ ++ return 0; ++} ++ ++static int efm32_i2c_probe(struct platform_device *pdev) ++{ ++ struct efm32_i2c_ddata *ddata; ++ struct resource *res; ++ unsigned long rate; ++ int ret; ++ u32 clkdiv; ++ ++ ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); ++ if (!ddata) { ++ dev_dbg(&pdev->dev, "failed to allocate private data\n"); ++ return -ENOMEM; ++ } ++ platform_set_drvdata(pdev, ddata); ++ ++ strlcpy(ddata->adapter.name, pdev->name, sizeof(ddata->adapter.name)); ++ ddata->adapter.owner = THIS_MODULE; ++ ddata->adapter.algo = &efm32_i2c_algo; ++ ddata->adapter.dev.parent = &pdev->dev; ++ ddata->adapter.dev.of_node = pdev->dev.of_node; ++ i2c_set_adapdata(&ddata->adapter, ddata); ++ ++ spin_lock_init(&ddata->lock); ++ ++ ddata->clk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(ddata->clk)) { ++ ret = PTR_ERR(ddata->clk); ++ dev_err(&pdev->dev, "failed to get clock: %d\n", ret); ++ return ret; ++ } ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ dev_err(&pdev->dev, "failed to determine base address\n"); ++ return -ENODEV; ++ } ++ ++ if (resource_size(res) < 0x42) { ++ dev_err(&pdev->dev, "memory resource too small\n"); ++ return -EINVAL; ++ } ++ ++ ddata->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(ddata->base)) ++ return PTR_ERR(ddata->base); ++ ++ ret = platform_get_irq(pdev, 0); ++ if (ret <= 0) { ++ dev_err(&pdev->dev, "failed to get irq (%d)\n", ret); ++ if (!ret) ++ ret = -EINVAL; ++ return ret; ++ } ++ ++ ddata->irq = ret; ++ ++ ret = clk_prepare_enable(ddata->clk); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "failed to enable clock (%d)\n", ret); ++ return ret; ++ } ++ ++ ret = efm32_i2c_probe_dt(pdev, ddata); ++ if (ret > 0) { ++ /* not created by device tree */ ++ const struct efm32_i2c_pdata *pdata = ++ dev_get_platdata(&pdev->dev); ++ ++ if (pdata) ++ ddata->pdata = *pdata; ++ else { ++ ddata->pdata.location = ++ efm32_i2c_get_configured_location(ddata); ++ ddata->pdata.frequency = 100000; ++ } ++ ++ ddata->adapter.nr = pdev->id; ++ } else if (ret < 0) { ++ goto err_disable_clk; ++ } ++ ++ rate = clk_get_rate(ddata->clk); ++ if (!rate) { ++ dev_err(&pdev->dev, "there is no input clock available\n"); ++ ret = -EIO; ++ goto err_disable_clk; ++ } ++ clkdiv = DIV_ROUND_UP(rate, 8 * ddata->pdata.frequency) - 1; ++ if (clkdiv >= 0x200) { ++ dev_err(&pdev->dev, ++ "input clock too fast (%lu) to divide down to bus freq (%lu)", ++ rate, ddata->pdata.frequency); ++ ret = -EIO; ++ goto err_disable_clk; ++ } ++ ++ dev_dbg(&pdev->dev, "input clock = %lu, bus freq = %lu, clkdiv = %lu\n", ++ rate, ddata->pdata.frequency, (unsigned long)clkdiv); ++ efm32_i2c_write32(ddata, REG_CLKDIV, REG_CLKDIV_DIV(clkdiv)); ++ ++ efm32_i2c_write32(ddata, REG_ROUTE, REG_ROUTE_SDAPEN | ++ REG_ROUTE_SCLPEN | ++ REG_ROUTE_LOCATION(ddata->pdata.location)); ++ ++ efm32_i2c_write32(ddata, REG_CTRL, REG_CTRL_EN | ++ REG_CTRL_BITO_160PCC | 0 * REG_CTRL_GIBITO); ++ ++ efm32_i2c_write32(ddata, REG_IFC, REG_IFC__MASK); ++ efm32_i2c_write32(ddata, REG_IEN, REG_IF_TXC | REG_IF_ACK | REG_IF_NACK ++ | REG_IF_ARBLOST | REG_IF_BUSERR | REG_IF_RXDATAV); ++ ++ /* to make bus unbusy */ ++ efm32_i2c_write32(ddata, REG_CMD, REG_CMD_ABORT); ++ ++ ret = request_irq(ddata->irq, efm32_i2c_irq, 0, DRIVER_NAME, ddata); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "failed to request irq (%d)\n", ret); ++ return ret; ++ } ++ ++ ret = i2c_add_numbered_adapter(&ddata->adapter); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to add i2c adapter (%d)\n", ret); ++ free_irq(ddata->irq, ddata); ++ ++err_disable_clk: ++ clk_disable_unprepare(ddata->clk); ++ } ++ return ret; ++} ++ ++static int efm32_i2c_remove(struct platform_device *pdev) ++{ ++ struct efm32_i2c_ddata *ddata = platform_get_drvdata(pdev); ++ ++ free_irq(ddata->irq, ddata); ++ clk_disable_unprepare(ddata->clk); ++ ++ return 0; ++} ++ ++static const struct of_device_id efm32_i2c_dt_ids[] = { ++ { ++ .compatible = "efm32,i2c", ++ }, { ++ /* sentinel */ ++ } ++}; ++MODULE_DEVICE_TABLE(of, efm32_i2c_dt_ids); ++ ++static struct platform_driver efm32_i2c_driver = { ++ .probe = efm32_i2c_probe, ++ .remove = efm32_i2c_remove, ++ ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .of_match_table = efm32_i2c_dt_ids, ++ }, ++}; ++module_platform_driver(efm32_i2c_driver); ++ ++MODULE_AUTHOR("Uwe Kleine-Koenig "); ++MODULE_DESCRIPTION("EFM32 i2c driver"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:" DRIVER_NAME); +diff --git a/include/linux/platform_data/efm32-i2c.h b/include/linux/platform_data/efm32-i2c.h +new file mode 100644 +index 0000000..5e175db +--- /dev/null ++++ b/include/linux/platform_data/efm32-i2c.h +@@ -0,0 +1,15 @@ ++#ifndef __LINUX_PLATFORM_DATA_EFM32_I2C_H__ ++#define __LINUX_PLATFORM_DATA_EFM32_I2C_H__ ++ ++#include ++ ++/** ++ * struct efm32_i2c_pdata ++ * @location: pinmux location for the I/O pins (to be written to the ROUTE ++ * register) ++ */ ++struct efm32_i2c_pdata { ++ u8 location; ++ unsigned long frequency; /* in Hz */ ++}; ++#endif /* ifndef __LINUX_PLATFORM_DATA_EFM32_I2C_H__ */ diff --git a/patches/linux-3.12-rc4/0028-RFC-framebuffer-provide-generic-get_fb_unmapped_area.patch b/patches/linux-3.12-rc4/0028-RFC-framebuffer-provide-generic-get_fb_unmapped_area.patch new file mode 100644 index 0000000..cebdc48 --- /dev/null +++ b/patches/linux-3.12-rc4/0028-RFC-framebuffer-provide-generic-get_fb_unmapped_area.patch @@ -0,0 +1,62 @@ +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 18 Nov 2013 11:40:16 +0100 +Subject: [PATCH] RFC: framebuffer: provide generic get_fb_unmapped_area +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This patch makes mmapping the simple-framebuffer device work on a no-MMU +ARM target. The code is mostly taken from +arch/blackfin/kernel/sys_bfin.c. + +Note this is only tested on this no-MMU machine and I don't know enough +about framebuffers and mm to decide if this patch is sane. Also I'm +unsure about the size check because it triggers if userspace page aligns +the len parameter. (I don't know how usual it is to do, I'd say it's +wrong, but my test program (fbtest by Geert Uytterhoeven) does it.) + +Signed-off-by: Uwe Kleine-König +--- + drivers/video/fbmem.c | 22 +++++++++++++++++++--- + 1 file changed, 19 insertions(+), 3 deletions(-) + +diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c +index dacaf74..68a6fa7 100644 +--- a/drivers/video/fbmem.c ++++ b/drivers/video/fbmem.c +@@ -1483,6 +1483,24 @@ __releases(&info->lock) + return 0; + } + ++#ifdef HAVE_ARCH_FB_UNMAPPED_AREA ++#define fb_get_unmapped_area get_fb_unmapped_area ++#else ++unsigned long fb_get_unmapped_area(struct file *filp, unsigned long orig_addr, ++ unsigned long len, unsigned long pgoff, unsigned long flags) ++{ ++ struct fb_info * const info = filp->private_data; ++ unsigned long screen_size = info->screen_size ?: info->fix.smem_len; ++ ++ screen_size = PAGE_ALIGN(screen_size); ++ ++ if (pgoff > screen_size || len > screen_size - pgoff) ++ return -EINVAL; ++ ++ return (unsigned long)info->screen_base; ++} ++#endif ++ + static const struct file_operations fb_fops = { + .owner = THIS_MODULE, + .read = fb_read, +@@ -1494,9 +1512,7 @@ static const struct file_operations fb_fops = { + .mmap = fb_mmap, + .open = fb_open, + .release = fb_release, +-#ifdef HAVE_ARCH_FB_UNMAPPED_AREA +- .get_unmapped_area = get_fb_unmapped_area, +-#endif ++ .get_unmapped_area = fb_get_unmapped_area, + #ifdef CONFIG_FB_DEFERRED_IO + .fsync = fb_deferred_io_fsync, + #endif diff --git a/patches/linux-3.12-rc4/series b/patches/linux-3.12-rc4/series new file mode 100644 index 0000000..69b5736 --- /dev/null +++ b/patches/linux-3.12-rc4/series @@ -0,0 +1,31 @@ +# generated by git-ptx-patches +#tag:base --start-number 1 +0001-ARM-v7-M-drop-using-mach-entry-macro.S.patch +0002-ARM-deprecate-mach-timex.h-for-ARCH_MULTIPLATFORM.patch +0003-ARM-make-mach-xyz-Makefile.boot-optional-for-ARCH_MU.patch +0004-ARM-new-platform-for-Energy-Micro-s-EFM32-Cortex-M3-.patch +0005-ARM-call-of_clk_init-from-default-time_init-handler.patch +0006-ARM-DEBUG_LL-on-efm32-SoCs.patch +0007-spi-efm32-drop-unused-struct-and-fix-size-check.patch +0008-ARM-drop-ARCH_MULTIPLATFORM-dependency-of-XIP_KERNEL.patch +0009-ARM-allow-MULTIPLATFORM-on-no-MMU-machines.patch +0010-RFC-ARM-prepare-ARMv7-M-for-MULTIPLATFORM-use.patch +0011-clocksource-Provide-timekeeping-for-efm32-SoCs.patch +0012-clk-new-driver-for-efm32-SoC.patch +0013-ARM-device-trees-for-Energy-Micro-s-EFM32-Cortex-M3-.patch +0014-ARM-efm32-some-more-stuff.patch +0015-gpio-new-driver-for-Energy-Micro-s-GPIO-component.patch +0016-efm-board-controller-driver.patch +0017-hwmon-efm32-adc-new-driver.patch +0018-ARM-v7m-add-trivial-suspend-support.patch +0019-ARM-efm32-add-trivial-suspend-support.patch +0020-ARM-efm32gg-dk3750-add-simple-framebuffer.patch +0021-HACK-ARM-allow-a-bootloader-to-be-embedded-and-do-it.patch +0022-HACK-don-t-reserve-memory-for-device-tree-if-it-s-be.patch +0023-HACK-make-stack-dumps-provoked-by-BUG-a-bit-more-hel.patch +0024-HACK-ARM-increase-TASK_SIZE-for-MMU.patch +0025-HACK-work-around-for-big-images.patch +0026-HACK-make-printhex-and-printch-work-on-efm32-with-XI.patch +0027-wip-i2c.patch +0028-RFC-framebuffer-provide-generic-get_fb_unmapped_area.patch +# 77f022151584e551c4353d59bdc31fbc - git-ptx-patches magic diff --git a/platformconfig b/platformconfig index 448dc83..1347a11 100644 --- a/platformconfig +++ b/platformconfig @@ -95,8 +95,8 @@ PTXCONF_TARGET_EXTRA_LDFLAGS="-march=armv7-m -mthumb" PTXCONF_KERNEL=y # PTXCONF_KERNEL_INSTALL is not set # PTXCONF_KERNEL_MODULES is not set -PTXCONF_KERNEL_VERSION="3.11-rc1" -PTXCONF_KERNEL_MD5="bf7c2b855be58793812d8ac72962c851" +PTXCONF_KERNEL_VERSION="3.12-rc4" +PTXCONF_KERNEL_MD5="f7586f9af94d28eb58fd27ca4f8caac5" PTXCONF_KERNEL_ARCH_STRING="arm" # PTXCONF_KERNEL_IMAGE_BZ is not set # PTXCONF_KERNEL_IMAGE_Z is not set -- cgit v1.2.3